Via Sidewall Concavity and Cyclic Metal Deposition for Robust TSVs
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in achieving a thicker metal protection layer in high-aspect-ratio vias or trenches with scallop-like sidewalls, while maintaining a continuous and robust conductive layer to prevent damage from light beams or other operational stresses.
Innovation Solution
The solution involves forming a pre-passivation liner layer to smooth out Bosch process-induced wall scalloping and implementing a cyclic deposition and etching process to achieve a thicker metal film on the sidewalls of through substrate vias, ensuring the conductive layer is robust and continuous.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard deposition process is used to form a conductive layer, then the process is simple and fast, but the metal protection layer is too thin to prevent damage from light beams or operational stresses
Solution Approach 1:
The patent implements a cyclic deposition and etching process where deposition and etching steps are performed alternately multiple times. This periodic action builds up a thicker, more robust conductive layer incrementally, resolving the contradiction between layer robustness and process simplicity by replacing a single-step deposition with a controlled multi-cycle process.
Solution Approach 2:
The patent performs a preliminary etching step before deposition to create a scallop-like sidewall structure, and then performs preliminary deposition to form an initial metal layer. This preliminary action prepares the surface geometry that enables subsequent cyclic deposition to build up thicker protective layers effectively, addressing the robustness requirement before the main deposition cycles begin.
2Reliability
If the sidewalls of vias are smooth, then the deposition process is simple, but the conductive layer cannot achieve sufficient thickness on the sidewalls to provide robust protection
Solution Approach 1:
The patent intentionally creates scallop-like curved sidewalls through the etching process instead of maintaining smooth straight sidewalls. This curvature increases the surface area and provides better geometric coverage during cyclic deposition, enabling the metal film to achieve sufficient thickness on sidewalls. The curved geometry transforms the deposition dynamics to favor thicker sidewall coverage, resolving the contradiction between film thickness and sidewall structure simplicity.
3Object-affected harmful factors
If a thicker conductive layer is formed through multiple deposition cycles, then the protection against light beams is improved, but the manufacturing time and process complexity increase
Solution Approach 1:
The patent uses periodic cyclic deposition and etching processes to build up the conductive layer thickness incrementally. This approach distributes the total deposition time across multiple shorter cycles, allowing for better process control and enabling the formation of thicker protective layers that can withstand light beam damage, thereby resolving the contradiction between protection level and manufacturing time through optimized cyclic processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a semiconductor device with a robust conductive layer that is less likely to be damaged by light beams, and which can function effectively as a beam deflector or in other applications requiring high reliability and durability.
Implementation Method 1
performing a cyclic deposition and etching process to form a conductive layer on a sidewall of the at least one via
Data Source
AI summary
A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.