Via Smoothing Layer for Semiconductor Substrate Surface Finish
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Solution Overview
Problem
Existing semiconductor via structures face challenges due to rough interior surfaces formed during etching processes, leading to impaired signal transmission, electrical leakage, and mechanical stress, which are not adequately addressed by current methods that either reduce etching rates or increase processing costs and complexity.
Innovation Solution
A method involving the deposition of a smoothing layer with reduced surface roughness within the via openings, followed by the formation of an insulating layer and a conductive element, where the smoothing layer is distinct from the semiconductor material and has a thermal expansion coefficient matching that of the semiconductor, and optionally using glass-forming materials for reflow to create a smooth interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high etch rates are used to increase productivity, then via formation speed improves, but interior surface roughness increases leading to signal transmission impairment and electrical leakage
Solution Approach 1:
The via structure is segmented into distinct functional layers: a rough interior surface formed by high-rate etching, a smoothing layer deposited to reduce roughness, and an insulating layer formed over the smoothing layer. This segmentation allows each layer to address specific requirements - the etching process maintains productivity while the subsequent layers resolve the roughness-induced reliability issues.
Solution Approach 2:
A smoothing layer is introduced as an intermediary between the rough etched surface and the insulating layer. This smoothing layer acts as a mediator that reduces surface roughness without requiring a return to low etch rates, thereby maintaining productivity while improving signal transmission and reducing electrical leakage.
2Manufacturing precision
If etch rates are reduced to decrease surface roughness, then interior surface smoothness improves, but via formation time increases reducing productivity
Solution Approach 1:
The smoothing layer is deposited in advance before forming the insulating layer. This preliminary action of smoothing the surface allows subsequent insulating layer formation to proceed efficiently without requiring slow, precision-controlled processes, thereby maintaining overall productivity while achieving the desired surface smoothness.
Solution Approach 2:
The mechanical etching process that directly controls surface roughness through etch rate adjustment is replaced by a chemical deposition process (CVD) that forms the smoothing layer. This substitution allows rapid formation of a smooth surface without the time penalty of using slow etch rates.
3Reliability
If thick dielectric layers are deposited to compensate for roughness, then electrical isolation improves, but via diameter increases occupying valuable space
Solution Approach 1:
The smoothing layer provides localized quality improvement by reducing roughness only where needed - at the interface between the via and the insulating layer. This localized smoothing allows thin insulating layers to achieve adequate electrical isolation without requiring thick dielectric layers that would increase via diameter.
Solution Approach 2:
The surface roughness parameter is changed by depositing the smoothing layer, which transforms the rough etched surface into a smoother interface. This parameter change enables the use of thinner insulating layers while maintaining electrical isolation performance, thereby preventing via diameter increase.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved signal transmission, reduced electrical leakage, and enhanced structural reliability by creating a smooth interface between the conductive element and the semiconductor, while maintaining high etch rates and minimizing costs.
Implementation Method 1
The smoothing layer can be formed by depositing a material such as silicon, glass, or other suitable materials onto the interior surface of the via opening using chemical vapor deposition (CVD) or other deposition techniques.
Implementation Method 2
optionally using glass-forming materials for reflow to create a smooth interface
Data Source
AI summary
An opening such as a small-diameter via is formed in a semiconductor substrate such as a monocrystalline silicon chip or wafer by a high etch rate process which leaves the opening with a rough interior surface. A smoothing layer such as a polysilicon layer is applied over the interior surfaces of the openings. The smoothing layer presents a surface smoother than the original interior surface. An insulating layer is formed over the smoothing layer or formed from the smoothing layer, and a conductive element such as a metal is formed in the opening. In a variant, a glass-forming material such as BPSG is applied in the opening. The glass-forming material is reflowed to form a glassy insulating layer which presents a smooth surface. The interface between the metal conductive element and the insulating or glassy layer is smooth, which improves mechanical and electrical properties.