Via Structure for Compact MEMS Mirror Arrays
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Solution Overview
Problem
Existing micro-mechanic devices face challenges in closely spacing mirrors due to lateral routing of electrical leads, which causes disturbances and requires wire-bonding on the same side of the wafer, limiting further reduction in dimensions and mirror spacing.
Innovation Solution
The use of vias through the wafer allows for the positioning of actuation electrodes underneath mirrors without disturbing other mirrors, enabling routing of leads within the wafer native material on the backside, using a layered structure with alternating conductive and insulating layers to provide insulated conductive connections and reduce interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If lateral routing of electrical leads is used on the surface of the wafer, then electrical connection to electrodes is achieved, but mirror spacing cannot be reduced and disturbances to adjacent mirrors occur
Solution Approach 1:
The patent transitions electrical lead routing from the lateral surface dimension to the vertical depth dimension by routing leads through vias that penetrate the substrate thickness. This allows leads to connect electrodes underneath mirrors without occupying lateral space, enabling closer mirror spacing and eliminating interference with adjacent mirrors.
2Length of moving object
If wire-bonding is performed on the same side of the wafer as mirrors, then electrical connection is established, but wafer space is consumed and mirror spacing cannot be further reduced
Solution Approach 1:
The invention moves wire-bonding operations from the lateral plane to the vertical dimension by routing all electrical connections through vias that pass through the substrate. This eliminates the need for surface-mounted wire bonds, freeing up wafer space and allowing mirrors to be spaced more closely together.
3Length of moving object
If electrodes are positioned underneath mirrors via substrate routing, then mirror spacing can be reduced, but routing complexity increases
Solution Approach 1:
The patent segments the electrical connection path into distinct vertical layers: top electrode layer, insulating layer, via layer, and bottom electrode layer. This segmentation allows each layer to be optimized independently and simplifies the routing process by confining connections to specific vertical zones rather than requiring complex lateral pathways.
Solution Approach 2:
By transitioning from lateral surface routing to vertical through-substrate routing, the patent simplifies the overall routing architecture. The via-based approach provides direct vertical pathways that are easier to implement than complex meandering surface routes, reducing routing complexity while enabling closer mirror spacing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables closer spacing of mirrors without disturbing adjacent elements, improves manufacturing efficiency, and allows for more compact designs by eliminating the need for surface routing and wire-bonding, enhancing the performance of micro-mechanic devices like mirror arrays and energy harvesting systems.
Implementation Method 1
an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers
Implementation Method 2
an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer
Implementation Method 3
at least three alternating electrically conductive layers with insulating layers between the conductive layers... movable elements that can be actuated electrically and/or electrostatically by means of electrodes
Data Source
AI summary
A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.