Via Structure for Fan-Out Packaging with Polymer Stop Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional packaging technologies face challenges in forming thin pillars or vias to efficiently interconnect conductive pads of a die to package balls or bumps, leading to difficulties in controlling pillar height and package size, especially in fan-out and 3D integrated circuit configurations.
Innovation Solution
The method involves forming a polymer layer with tapered sidewalls over conductive pads, followed by a liner and conductive layer deposition, and subsequent planarization to create thin pillars with controlled height and width, allowing for efficient redistribution layers and external connectors to increase I/O counts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional packaging technologies are used to form pillars or vias, then electrical connections can be made between die and package substrate, but controlling pillar height and package size becomes difficult
Solution Approach 1:
A polymer layer is introduced as an intermediary stop layer during the grinding process. This polymer layer is formed over the conductive pads and pillars, and grinding is performed through the polymer layer to expose the pillars. The polymer layer acts as a mediator that enables precise control of pillar height by serving as a removable reference plane, thereby resolving the difficulty in controlling pillar height and package size.
Solution Approach 2:
The polymer layer is formed in advance before the grinding process. This preliminary action establishes a controlled thickness layer that will serve as the stop layer during subsequent grinding operations, enabling precise pillar height control before the actual pillar exposure occurs.
2Quantity of substance
If fan-out packaging is used to redistribute I/O pads, then the number of I/O pads can be increased, but the package size and complexity increase
Solution Approach 1:
The invention utilizes vertical redistribution through stacked conductive layers and pillars rather than only horizontal expansion. By forming multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) with pillars extending between them, the I/O redistribution is achieved in the vertical dimension, allowing increased I/O density without proportionally increasing package area.
Data Source
AI summary
A via or pillar structure, and a method of forming, is provided. In an embodiment, a polymer layer is formed having openings exposing portions of an underlying conductive pad. A conductive layer is formed over the polymer layer, filling the openings. The dies are covered with a molding material and a planarization process is performed to form pillars in the openings. In another embodiment, pillars are formed and then a polymer layer is formed over the pillars. The dies are covered with a molding material and a planarization process is performed to expose the pillars. In yet another embodiment, pillars are formed and a molding material is formed directly over the pillars. A planarization process is performed to expose the pillars. In still yet another embodiment, bumps are formed and a molding material is formed directly over the bumps. A planarization process is performed to expose the bumps.