Via Wiring Structure Using Au Base Layer to Prevent Side Etching
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Solution Overview
Problem
The existing techniques for forming via holes in semiconductor substrates, particularly in high electron mobility transistors (HEMTs) using nitride semiconductors, face issues with side etching due to low etching selectivity of the base layer, leading to disconnection of via wiring and compromised semiconductor device performance.
Innovation Solution
A semiconductor device structure is implemented with a gold (Au) layer as the base layer and a nickel (Ni) layer as the mask, using electroplating to form a thick, low-stress layer, which prevents side etching during etching with chlorine-based gases, ensuring the integrity of via wiring on the inner surface of the via holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a base layer with low etching selectivity (e.g., Ta-Cu multi-layer) is used under the Ni mask, then the Ni mask can be formed on the semiconductor substrate, but side etching occurs on the base layer during etching, causing stepped portions that hinder via wiring formation and lead to disconnection
Solution Approach 1:
The patent changes the material parameter of the base layer from conventional Ta-Cu multi-layer to a thick Au layer (50-200 nm). Gold exhibits high etching selectivity against chlorine-based etching gases used for GaN etching, preventing side etching. This material parameter change resolves the contradiction by maintaining both via wiring reliability and manufacturing precision simultaneously.
Solution Approach 2:
The patent creates a composite structure consisting of a thick Au base layer combined with a Ni mask layer. The Au-Ni composite structure leverages the high etching resistance of gold against chlorine-based gases while maintaining the mask functionality of nickel, solving the side etching problem without compromising via wiring formation.
2Reliability
If a thick Au layer is used as the base layer instead of a conventional base layer, then side etching is prevented during etching with chlorine-based gases, but the device complexity increases due to additional material deposition steps
Solution Approach 1:
The thick Au layer serves multiple functions simultaneously: it acts as a base layer for Ni mask deposition, provides etching protection against chlorine-based gases, and serves as an electrical contact layer. This multi-functionality reduces the need for separate protective layers, thereby limiting the increase in device complexity while maintaining via wiring reliability.
Solution Approach 2:
The patent uses a thick Au layer that can be selectively removed after serving its protective function during etching. The Au layer is deposited thick enough to prevent side etching but can be removed later in the process, making it a temporary protective structure that fulfills its purpose and is then discarded, limiting long-term complexity increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents side etching and disconnection of via wiring, enhancing the electrical connection and performance of semiconductor devices by maintaining the structural integrity of the via holes and improving high-frequency characteristics.
Implementation Method 1
Ni achieving high etching selectivity is used as a mask. Between such Ni used as the mask and a semiconductor substrate to be etched, there may be a base layer
Implementation Method 2
using electroplating to form a thick, low-stress layer
Data Source
AI summary
A semiconductor device includes a first layer that contains gold (Au) and is formed on one surface of a semiconductor substrate and a second layer that contains nickel (Ni) and is formed on the first layer. The semiconductor device is provided with a via hole that passes through the second layer, the first layer, and the semiconductor substrate from one surface to another surface opposite thereto, and a via wiring is formed on the inner surface of the via hole. The second layer is a mask used when the semiconductor substrate is etched to form the via hole, and the first layer is a base layer for forming the second layer on the semiconductor substrate. By using an Au-containing layer as the first layer, side etching on the first layer is prevented when the semiconductor substrate is etched, and disconnection of the via wiring is prevented.