Via Wiring Substrate Layout for High-Density FO-WLP Packaging
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Solution Overview
Problem
Existing methods for fabricating fan-out wafer-level packages (FO-WLPs) face challenges in achieving high wiring density due to difficulties in grinding and connecting columnar electrical connectors, especially when semiconductor chips of varying heights are mounted, and require cumbersome modifications for alignment and formation of columnar electrical connectors.
Innovation Solution
A via wiring formation substrate is developed with a laminated structure of support substrate, releasable adhesive layers, and insulating layers, utilizing photolithography processes to create via wirings that align with semiconductor chip terminals without misalignment, and a method to form these vias through etching and metal column embedding, allowing simultaneous mounting of semiconductor chips with different heights.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If columnar electrical connectors are used to achieve high wiring density, then wiring density is improved, but difficulty in grinding and connecting increases
Solution Approach 1:
The patent extracts the columnar electrical connectors from the molding process entirely. Instead of forming connectors within the molding material and then grinding them exposed, the invention uses through-molding vias that penetrate through the molding material, eliminating the need for columnar connectors and the associated grinding operations. This resolves the contradiction by removing the problematic element while maintaining wiring density through the via structure.
Solution Approach 2:
The patent replaces the mechanical grinding process with a chemical etching process. Instead of mechanically grinding the molding material to expose connectors, the invention uses etching solutions to selectively remove molding material and form through-molding vias. This substitution eliminates the difficulty of grinding while achieving the same goal of creating electrical pathways through the molding material.
2Manufacturing precision
If columnar electrical connectors are formed to achieve high wiring density, then wiring density is improved, but device complexity increases due to multiple modification steps
Solution Approach 1:
The patent merges the formation of electrical pathways directly into the molding process itself. By forming through-molding vias during the molding operation rather than as separate subsequent steps, the invention combines multiple operations into one, significantly reducing process complexity while maintaining high wiring density through the integrated via structure.
Solution Approach 2:
The patent performs the via formation action preliminarily, during the molding process itself, rather than as a subsequent operation. The through-molding vias are created while the molding material is still in its formable state, allowing the electrical pathways to be established before final curing and assembly. This preliminary action eliminates the need for later modification steps and reduces overall process complexity.
3Reliability
If columnar electrical connectors are used, then electrical connection is achieved, but adaptability to chips of varying heights is reduced
Solution Approach 1:
The patent introduces flexibility and adaptability into the electrical connection system through the use of conductive adhesive material filling the through-molding vias. Unlike rigid columnar connectors, the conductive adhesive can be applied in varying amounts and configurations to accommodate different chip heights. This dynamic approach allows the same via structure to reliably connect chips of varying heights, resolving the contradiction between connection reliability and height adaptability.
Solution Approach 2:
The patent changes the physical state and properties of the electrical connection medium from rigid columnar structures to a flowable conductive adhesive material. This parameter change allows the connection medium to adapt to varying chip heights by adjusting its volume and shape, while still providing reliable electrical connection. The conductive adhesive can be dispensed to different heights and will conform to the chip surface, achieving both reliability and adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables simultaneous mounting of semiconductor chips with varying heights without preforming columnar electrical connectors, improving wiring density and reducing production complexity by using photolithography for precise via formation, thus enhancing the manufacturing process efficiency.
Implementation Method 1
utilizing photolithography processes to create via wirings that align with semiconductor chip terminals without misalignment
Implementation Method 2
a method to form these vias through etching and metal column embedding
Data Source
AI summary
A via wiring formation substrate for mounting at least one semiconductor chip, the substrate including a support substrate, a releasable adhesive layer provided on the support substrate, a first insulating layer provided on the releasable adhesive layer, and a second insulating layer laminated on the first insulating layer, wherein the first insulating layer and the second insulating layer are provided with a via wiring formation via, the via wiring formation via enabling formation of via wirings which respectively correspond to a plurality of connection terminals of the semiconductor chip and which respectively connect the plurality of connection terminals, such that the via wiring formation via penetrates only through the first insulating layer and the second insulating layer without misalignment.