Video Audio Output Device Clock Adjustment for Synchronization

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Solution Overview

Problem

In digital television broadcast receivers, maintaining audio-video synchronization is challenging when image quality adjustments or surround sound processing introduces delays, as existing solutions require large audio output delay buffers, increasing complexity and power consumption.

Innovation Solution

A video/audio data output device that compensates for video processing delays by adjusting the system clock or presentation time stamps supplied to the audio output section, eliminating the need for an audio output delay buffer and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an audio output delay buffer is used to compensate for video processing delays, then audio-video synchronization is maintained, but device complexity and power consumption increase

Engineering Contradiction:
Improveaudio-video synchronizationVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the delay compensation function from the audio output path by removing the audio output delay buffer. Instead, it adjusts the system clock frequency dynamically to match the video processing delay, thereby achieving synchronization without the buffer.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the system clock frequency parameter dynamically based on the detected video processing delay. By adjusting the clock frequency, the audio output timing is synchronized with the video output timing without requiring additional buffering hardware.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If an audio output delay buffer is used to compensate for video processing delays, then audio-video synchronization is maintained, but power consumption increases

Engineering Contradiction:
Improveaudio-video synchronizationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent removes the power-consuming audio output delay buffer from the system. The synchronization function is achieved through dynamic system clock frequency adjustment, which consumes significantly less power than maintaining a large buffer memory and its associated control circuitry.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By dynamically adjusting the system clock frequency, the patent achieves timing synchronization without the energy overhead of buffer operations. The clock frequency is modified to match the video processing delay characteristics, eliminating the need for continuous buffer management power consumption.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If video processing delays are compensated by buffering audio output, then audio-video synchronization is achieved, but the system requires large buffer memory

Engineering Contradiction:
Improveaudio-video synchronizationVSAvoidbuffer memory
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the delay compensation mechanism from the traditional buffer-based approach. Instead of storing audio data in a large buffer, it uses system clock frequency adjustment to timing the audio output to match video processing delays, thereby eliminating the need for large buffer memory.

Inventive Principle:
Principle #2Taking out (Extraction)

4Device complexity

If the system uses fixed clock frequency for audio output, then circuitry is simpler, but audio-video synchronization cannot be maintained when video processing delays vary

Engineering Contradiction:
ImprovecircuitryVSAvoidaudio-video synchronization
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces dynamics into the previously static system clock frequency. The clock frequency is now adjustable and adapts to varying video processing delays, allowing the system to maintain synchronization under different operating conditions without requiring complex additional circuitry.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8842218B2Video/audio data output device and method
Publication Date: 2014.09.23 SOCIONEXT INC
  • US8842218B2 patent drawing
  • US8842218B2 patent drawing
  • US8842218B2 patent drawing

AI summary

A video/audio data output device includes a demultiplexing section, a video decoder that generates video data by decoding the video stream signal, an audio decoder that generates audio data by decoding the audio stream signal, a video output section that outputs the video data in synchronism with the system clock, an audio output section that outputs the audio data in synchronism with the system clock, a video adjusting section, and an audio output adjusting section. The demultiplexing section demultiplexes a video stream signal, an audio stream signal, and a system clock from an input signal, the video adjusting section processes a video frame that has been output from the video output section, and the audio output adjusting section delays the system clock to be supplied to the audio output section, in accordance with a length of time that the video adjusting section takes to process the video frame.