Video Channel Display Method Using Multi-Module Frame Segmentation
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Solution Overview
Problem
Current display devices are unable to effectively play video contents in resolutions higher than full HD, as the conversion process is computationally expensive and often results in distorted and blurred images.
Innovation Solution
A method involving a main computing module and one or more ancillary computing modules that read and decode video files, with synchronization control information blocks transmitted to coordinate the decoding of frame parts across modules, allowing for the combination of decoded content to display high-resolution video without exceeding computing power limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If video contents in higher resolutions (6K or 8K) are converted to lower resolutions (e.g., 1920*1080 pixels), then the video can be displayed on existing devices, but the conversion process is computationally expensive and causes converted videos to become distorted and blur
Solution Approach 1:
The patent divides the high-resolution video frame into multiple sub-regions (e.g., four quadrants) and processes each region separately using different computing modules. This segmentation allows the system to handle high-resolution content by breaking down the complex conversion task into manageable parts, reducing computational burden while maintaining image quality through selective processing of only necessary regions
2Adaptability or versatility
If video contents in higher resolutions (6K or 8K) are converted to lower resolutions, then the video can be displayed on existing devices, but the conversion process is too computationally expensive
Solution Approach 1:
The patent employs multiple computing modules (first computing module, second computing module, third computing module) that each handle specific portions of the video processing task. By segmenting the computational workload across multiple modules, the system reduces the computational burden on any single module, making high-resolution video processing feasible on existing hardware
Solution Approach 2:
The patent applies resolution conversion only to specific regions of the video frame that require it, rather than converting the entire high-resolution frame. This partial action approach reduces computational expense by processing only the necessary portions of the video content while maintaining high resolution in other areas
Data Source
AI summary
Methods for video display using a computing system. The computing system includes a main computing module and an ancillary computing module. The main computing module may transmit a synchronization control information block to the ancillary computing module. The synchronization control information block includes a frame number of a current frame and the reference time associated with the main computing module. The ancillary computing module receives the synchronization control information block and selects a frame pack having the same frame number contained in the synchronization control information block as the current frame. The ancillary computing module may obtain the reference time of the current frame based on a local time of the ancillary computing module. The main computing module and the ancillary computing module may decode one or more parts of the frame, respectively. Further, the decoded parts of the frame may be combined and displayed.

