Video Blank-Level Clamping Using DAC Dithering
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing level clamping circuits for composite video signals face challenges in achieving high precision while maintaining cost and size efficiency, as they require finer step sizes to accurately clamp the blank level, leading to increased costs and complexity.
Innovation Solution
A level clamping control circuit utilizing a dithering circuit, comprising a reference level estimator, subtractor, clamping computation circuit, and current-output DAC, which dithers control values to precisely adjust the capacitor's charge or discharge, allowing for accurate blank level clamping even with a low-resolution DAC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the step size of the level clamping circuit output is reduced to improve clamping precision, then the blank level clamping accuracy is improved, but the cost and size of the level clamping circuit increase
Solution Approach 1:
The patent introduces a dithering circuit as an intermediary component between the low-resolution DAC and the capacitor. This dithering circuit converts a single low-resolution control value into multiple high-resolution control values through dithering processing, enabling the system to achieve high clamping precision without requiring a high-resolution DAC, thus resolving the contradiction between precision and device complexity
Solution Approach 2:
The patent changes the parameter of control value resolution by using dithering technology. Instead of directly using the low-resolution control value from the DAC, the system applies dithering to generate multiple control values with effective resolution higher than the original DAC resolution, thereby achieving high clamping accuracy while maintaining the use of a low-resolution (and thus lower cost and smaller size) DAC
Data Source
AI summary
A level clamping control circuit and associated level clamping control method are provided. The level clamping control circuit includes a reference level estimator, a subtractor, a clamping computation circuit, a dithering circuit, and a digital-to-analog converter (DAC). The reference level estimator estimates a reference level of the input signal. The subtractor computes a difference between the reference level and a desired reference level to output a difference signal. The clamping computation circuit generates a first control value according to the difference signal. The dithering circuit dithers the first control value to alternately output a plurality of second control values. Finally, the DAC respectively utilizes the second control values to charge or discharge a capacitor to adjust the reference level of the input signal.