Video Clock Generation Stabilizing Laser Printer Image Quality

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Solution Overview

Problem

Conventional image formation apparatuses, such as color laser beam printers, generate abnormal video clock signals due to errors in clock signal generation, leading to image distortions and malfunctions in resolution enhancement technology.

Innovation Solution

A video clock generation apparatus and method that includes a ring oscillator, loopspeed detection unit, and video clock generation unit to suppress front-end video clock signal generation initially and maintain back-end clock states for a predetermined time to prevent clock errors, ensuring stable image formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If video clock signals are generated continuously including front-end and back-end periods, then the video clock generation apparatus operates continuously, but clock errors are produced causing image distortion

Engineering Contradiction:
Improvecontinuous operationVSAvoidimage quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the video clock signal generation into distinct phases: front-end video clock signals (suppressed), effective video clock signals (generated for image formation), and back-end video clock signals (maintained). This segmentation allows the system to generate clock signals only when necessary, preventing errors while maintaining continuous operation capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by suppressing front-end video clock signal generation before the effective video clock period begins. This preventive measure eliminates clock errors that would otherwise occur during the front-end period, ensuring reliable image formation without interrupting the overall continuous operation of the apparatus.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If control logic and multiplexer convert front-end and back-end video clock signals to system clock signals, then clock errors are removed, but conversion errors may cause malfunction in resolution enhancement technology

Engineering Contradiction:
Improveclock signal accuracyVSAvoidsignal processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the problematic conversion step by directly suppressing front-end video clock signal generation and maintaining back-end clock states. This removes the source of clock errors without requiring complex control logic and multiplexer operations, thereby reducing signal processing complexity while maintaining clock signal accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If video clock signals are initialized for rearranging main scanning direction, then the scanning direction is corrected, but abnormal video clock signals are generated causing image distortion

Engineering Contradiction:
Improvescanning direction controlVSAvoidvideo clock signal stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies dynamics by maintaining the clock state of back-end video clock signals for a predetermined time after initialization. This dynamic adjustment allows the system to adapt to scanning direction changes while preventing abnormal video clock signal generation, ensuring both scanning flexibility and signal stability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7443534B2Video clock generation apparatus and method
Publication Date: 2008.10.28 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US7443534B2 patent drawing
  • US7443534B2 patent drawing
  • US7443534B2 patent drawing

AI summary

A video clock generation apparatus and method are provided. The apparatus comprises a ring oscillator for generating an oscillation frequency; a loopspeed detection unit for detecting a loopspeed that represents the number of pulses generated at the oscillation frequency when the ring oscillator oscillates for a predetermined time; and a video clock generation unit for suppressing generation of front-end video clock signals for a predetermined initial time, and after a first predetermined time following initialization of the effective video clock signals, maintaining a clock state of back-end video clock signals for a second predetermined time, wherein the front-end video clock signals precede effective video clock signals for image formation and the back-end video clock signals follow the effective video clock signals, and wherein the maintained clock state is the clock state prior to the second predetermined time clock signals.