Video Clock Decoupling With PLL Sync for Network Jitter
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Solution Overview
Problem
Streaming audio/video data over IP networks faces challenges with packet jitter, loss of sync timing, and asynchronous video transmission, leading to artifacts and variable delays due to the loss of original source sync information during packetization and network transmission.
Innovation Solution
A system and method that include a video transmitter and receiver with a phase-locked loop to synchronize frame rates by encoding video frame boundary information, using sub-frame processing, and adjusting for network jitter, ensuring constant output timing signals and reducing variability in data rate through sub-frame playout delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If video data is packetized for network transmission, then network bandwidth efficiency is improved through compression and flexible routing, but original sync timing information is lost causing frame rate desynchronization
Solution Approach 1:
The patent segments video data into packets while embedding timing information within each packet structure. This allows the video stream to be divided for efficient network transmission while preserving synchronization data in each segment, resolving the conflict between bandwidth efficiency and timing information preservation.
Solution Approach 2:
The patent introduces an intermediary mechanism (timing stamps and synchronization headers) that mediates between the compressed video data and the required synchronization. These intermediary elements carry timing information through the network packetization process without compromising the compressed video stream's bandwidth efficiency.
2Adaptability or versatility
If frame buffers are used for frame rate conversion, then asynchronous video transmission is handled, but variable delays are introduced causing tearing and stutter artifacts
Solution Approach 1:
The patent implements feedback mechanisms where timing information from received packets is continuously monitored and used to adjust frame buffer operations. This feedback loop allows the system to maintain precise timing control while performing frame rate conversion, eliminating tearing and stutter artifacts.
Solution Approach 2:
The patent makes the frame buffer operation dynamic by adjusting read/write timing based on real-time packet arrival patterns and timing information. This dynamic adaptation allows precise timing control while maintaining the ability to handle asynchronous video transmission and frame rate conversion.
3Adaptability or versatility
If network packetization is used for video transmission, then network flexibility and routing options are improved, but packet jitter and loss occur causing timing variability
Solution Approach 1:
The patent incorporates beforehand cushioning by including timing stamps and synchronization data in advance within each packet. This preparatory inclusion of timing information cushions against the effects of packet jitter and loss, allowing the receiving end to reconstruct accurate timing even when packets arrive with variable delays or are lost.
Solution Approach 2:
The patent uses feedback from timing stamps embedded in packets to continuously monitor and correct for jitter effects. The receiving system uses this feedback to adjust its timing reconstruction, maintaining timing consistency despite network-induced packet jitter and variable arrival times.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively synchronizes frame rates across networks, reduces latency, and minimizes artifacts by maintaining constant timing signals, even with variable network conditions and frame rate conversions, ensuring high-quality video transmission.
Implementation Method 1
a video timing generator and a phase-locked loop, the at least one video receiver being configured for transmitting output video having a second frame rate to the video sink over a second interface, the video timing generator being configured for generating video output timing signals and using the phase-locked loop to synchronize the generated video output timing signals with the video frame boundary information
Data Source
AI summary
Presented are a system and method for distributing video over a network. The system includes a source that outputs video with a first frame rate, a transmitter, a receiver, and a sink. The transmitter receives video from the source and processes the video by encoding the video with frame boundary information, packetizing, and transmitting the video. The receiver includes a frame buffer, a timing generator, and a PLL. The receiver receives and processes the video by retrieving the frame boundary information, decoding the video into sub-frames, and writing the sub-frames to the buffer. All the processing occurs on sub-frame portions of the video in sub-frame time intervals. The receiver transmits video with a second frame rate to the sink. The timing generator generates output timing and uses the PLL to synchronize the output timing with the frame boundary information and synchronizes the first and second frame rates.