Video Codec Power Optimization via CPU-DSP Segmentation
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Solution Overview
Problem
Video communication in mobile devices consumes excessive power due to high computational complexity of video codecs, leading to reduced battery life and user experience.
Innovation Solution
Implementing video codecs on a Central Processing Unit (CPU) with Single Instruction Multiple Data (SIMD) extensions and post-processing modules, including deblocking filters, on a Digital Signal Processor (DSP) core, thereby reducing current consumption by up to 50%.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If video codecs are implemented on a single processor (DSP or CPU), then device complexity is reduced, but power consumption increases significantly
Solution Approach 1:
The video processing system is segmented into two distinct processing units: a CPU with SIMD extensions handles the video codec functions (encoding/decoding), while a separate DSP core handles the post-processing deblocking filter functions. This segmentation allows each processor to operate optimally for its specific task, reducing overall power consumption compared to using a single processor for all functions.
Solution Approach 2:
The system dynamically assigns different processing tasks to different cores based on their architectural strengths. The CPU handles codec operations while the DSP handles deblocking, and this dynamic task distribution enables more efficient power utilization. The pipeline architecture further enhances this by allowing simultaneous execution of different processing stages.
2Manufacturing precision
If video codecs are implemented with high computational complexity to maintain video quality, then video quality is improved, but battery life is reduced
Solution Approach 1:
Video processing is segmented into codec operations and deblocking filter operations, executed on separate processors. This segmentation maintains high video quality through proper execution of each processing stage while distributing the computational burden to extend battery life.
Solution Approach 2:
The system uses dynamic task assignment where the CPU executes codec functions and the DSP executes deblocking functions simultaneously through pipelining. This dynamic execution model maintains high video quality while optimizing power consumption to extend battery life.
3Productivity
If all video processing functions are implemented on a DSP core, then processing efficiency is improved, but power consumption increases due to DSP architecture limitations
Solution Approach 1:
Instead of implementing all video processing functions on the DSP core as conventionally done, the system inverts the approach by implementing the codec functions on the CPU with SIMD extensions and only the deblocking filter on the DSP. This inversion leverages the CPU's strengths for codec operations while using the DSP only for its specialized filtering functions, reducing overall power consumption.
Solution Approach 2:
Video processing is segmented such that codec operations run on the CPU and deblocking operations run on the DSP. This segmentation allows the system to leverage the CPU's SIMD capabilities for codec processing while using the DSP's specialized architecture only for filtering, improving processing efficiency while reducing current consumption compared to using the DSP for all functions.
Data Source
AI summary
The present invention provides a system and method for optimizing power consumption in video communication in mobile devices. The system comprises a video codec encoder module, a video codec decoder module and post-processing filtering module (Deblocking filter) modules. The post-processing modules are implemented on a DSP/VLIW processor, while the video encoder and decoder modules are implemented on a CPU with SIMD extensions. This pipelined implementation of modules in multi-core reduces current consumption in the SoC by up to 50 percent compared to an implementation of the modules in a single/multiple DSP/VLIW core. The significant reduction in current consumption of the modules enables reduction of power consumption in the video call time. Thus, the invention provides a simple method of optimizing power consumption by multi core implementation of the modules in a video call in mobile devices.