Video-data encoder CAVLC processing time reduction
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Solution Overview
Problem
The existing context adaptive variable length coding (CAVLC) in H.264 video compression takes longer to process 4×4 data blocks than it takes to receive them, causing a delay and introducing an overhead wait time that impacts bandwidth and frame rate, and increasing power consumption when attempting to run at higher clock frequencies.
Innovation Solution
Setting the last two coefficients of 4×4 data blocks to zero before encoding, which reduces the number of clock cycles required for CAVLC processing, allowing all stages to be completed in 16 or fewer clock cycles without affecting video quality significantly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CAVLC processes all coefficients in 4×4 data blocks, then encoding completeness is maintained, but processing time exceeds the time to receive data blocks, causing delay and overhead wait time
Solution Approach 1:
The patent extracts and removes the last two coefficients from the 4×4 data block before encoding. These coefficients are set to zero and excluded from the CAVLC processing, reducing the number of coefficients that need to be processed and thereby decreasing the processing time to match or exceed the data block reception time.
Solution Approach 2:
The patent changes the parameter of coefficient count by setting the last two coefficients to zero and excluding them from processing. This parameter change reduces the processing workload and allows the encoder to complete encoding within the same time frame as data block reception, eliminating overhead wait time.
2Power
If CAVLC processes all coefficients in 4×4 data blocks, then encoding completeness is maintained, but power consumption increases when running at higher clock frequencies
Solution Approach 1:
The patent extracts and removes the last two coefficients from the 4×4 data block before encoding. These coefficients are set to zero and excluded from the CAVLC processing, reducing the number of coefficients that need to be processed and thereby decreasing the processing time to match or exceed the data block reception time.
Solution Approach 2:
The patent applies partial action by processing only the first 14 coefficients out of the full 16 coefficients in each 4×4 block. The last two coefficients are intentionally skipped as they are set to zero, reducing the processing workload and enabling the encoder to run at higher clock frequencies with acceptable power consumption.
3Loss of time
If the last two coefficients are set to zero, then processing time is reduced to 16 or fewer clock cycles, but video quality may be affected
Solution Approach 1:
The patent extracts and removes the last two coefficients from the 4×4 data block before encoding. These coefficients are set to zero and excluded from the CAVLC processing, reducing the number of coefficients that need to be processed and thereby decreasing the processing time to match or exceed the data block reception time.
Solution Approach 2:
The patent changes the parameter of coefficient count by setting the last two coefficients to zero and excluding them from processing. This parameter change reduces the processing workload and allows the encoder to complete encoding within the same time frame as data block reception, eliminating overhead wait time.
Data Source
AI summary
Examples disclosed herein include a video-data encoder. The video data encoder may encode a 4×4 data block into a bit stream according to a context adaptive variable length coding. The 4×4 data block may be representative of video data. The video-data encoder may, while encoding the 4×4 data block, ignore at least some coefficients of the 4×4 data block. In some examples, the video-data encoder may ignore the at least some coefficients of the 4×4 data block by setting the at least some coefficients of the 4×4 data block to zero prior to encoding the 4×4 data block. Related devices, systems and methods are also disclosed.