Video Decoder HDR Conformance via SEI Postprocessing

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Solution Overview

Problem

Current video processing technologies face challenges in efficiently converting and conforming decoded video data to high dynamic range (HDR) and wide color gamut (WCG) formats, particularly in adhering to video coding standards like HEVC, due to issues with chroma up-sampling filters and floating-point operations, which affect conformance and quality.

Innovation Solution

The techniques involve using supplemental enhancement information (SEI) messages within video bitstreams to extract and apply HDR postprocessing data, such as upsampling chrominance data, inverse quantization, and color space conversions, to prepare decoded video data for HDR output, while ensuring conformance with video coding standards by comparing processed outputs against a reference decoder.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If chroma up-sampling filters are applied to convert decoded video data to HDR formats, then the color quality and dynamic range are improved, but the complexity of the processing system increases

Engineering Contradiction:
ImproveHDR conversion precisionVSAvoidprocessing system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary processing stage where decoded video data is first converted to a intermediate representation format before final HDR output. This intermediary step allows for standardized processing operations that simplify the overall system architecture while maintaining high conversion precision through controlled intermediate transformations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If floating-point operations are used for HDR postprocessing, then the processing accuracy is improved, but the risk of precision issues and conformance problems increases

Engineering Contradiction:
Improvepostprocessing accuracyVSAvoidconformance reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent systematically changes the numerical parameters and data types used in postprocessing operations. By carefully selecting and controlling parameter precision levels, the system achieves sufficient processing accuracy while avoiding the precision issues and conformance problems associated with floating-point operations. This involves using fixed-point arithmetic with carefully chosen bit depths and scaling factors.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If multiple postprocessing procedures are applied to decoded video data, then the HDR output quality is improved, but the processing time and computational load increase

Engineering Contradiction:
ImproveHDR output qualityVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs certain postprocessing operations in advance during the decoding stage rather than as separate subsequent steps. By preparing the video data with preliminary processing operations that enable later HDR transformations, the system reduces the computational burden and processing time required for final HDR output generation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent combines multiple postprocessing procedures into integrated processing pipelines where operations are merged and executed in optimized sequences. This consolidation reduces redundant computations and processing overhead while maintaining the quality benefits of applying multiple transformation operations to the decoded video data.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10200690B2Video decoder conformance for high dynamic range (HDR) video coding using a core video standard
Publication Date: 2019.02.05 QUALCOMM INC
  • US10200690B2 patent drawing
  • US10200690B2 patent drawing
  • US10200690B2 patent drawing

AI summary

In one example, a device for processing decoded video data a video decoder implemented by one or more hardware-based processing units comprising digital logic circuitry, and a postprocessing unit implemented by one or more hardware-based processing units comprising digital logic circuitry. The video decoder is configured to decode video data of a video bitsream according to a video coding standard, extract HDR postprocessing data from an SEI message of the video bitstream, and provide the decoded video data and the HDR postprocessing data to the postprocessing unit. The postprocessing unit is configured to process the decoded video data using the HDR postprocessing data according to the video coding standard. The device may additionally determine whether the video decoder is compliant with the video coding standard by comparing the processed video data with reference processed video data.