Video Decoder Jitter Reduction via Buffer and Virtual Clock

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Packet-based networks often experience jitter due to variable transmission delays, which can exceed the tolerance of video decoders, leading to data loss or unavailability for decoding.

Innovation Solution

A system and method that process bitstreams by controlling the processing rate of secondary data streams based on the receipt rate of primary data streams, using buffers and time stamps to adjust delivery schedules and synchronize with a system time clock, thereby reducing jitter in video decoder systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If packet-based networks are used for video transmission, then network flexibility and adaptability are improved, but jitter and variable transmission delays increase causing data loss

Engineering Contradiction:
Improvenetwork flexibilityVSAvoiddata availability for decoding
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs preliminary actions by buffering incoming packets and advancing the playback clock in anticipation of future packets. The decoder buffers packets arriving early and advances the playback clock before the actual playback time, ensuring that packets arrive at the decoder at regular intervals even though they arrived at irregular intervals from the network.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system introduces an intermediary mechanism consisting of a buffer and a virtual clock that mediates between the variable-rate network input and the constant-rate decoder output. This intermediary absorbs the jitter and variable delays from the network, transforming them into regular, predictable input for the decoder.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If variable transmission delays occur in packet-based networks, then network adaptability to different conditions is improved, but jitter exceeds decoder tolerance leading to data loss

Engineering Contradiction:
Improvenetwork adaptabilityVSAvoidtransmission delay variation
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by buffering incoming packets and advancing the playback clock in anticipation of future packets. The decoder buffers packets arriving early and advances the playback clock before the actual playback time, ensuring that packets arrive at the decoder at regular intervals even though they arrived at irregular intervals from the network.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system introduces an intermediary mechanism consisting of a buffer and a virtual clock that mediates between the variable-rate network input and the constant-rate decoder output. This intermediary absorbs the jitter and variable delays from the network, transforming them into regular, predictable input for the decoder.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If data is buffered and processing rate is controlled based on primary data stream receipt, then jitter is reduced and data availability is maintained, but system complexity increases

Engineering Contradiction:
Improvedata availabilityVSAvoidbuffer control mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system introduces an intermediary mechanism consisting of a buffer and a virtual clock that mediates between the variable-rate network input and the constant-rate decoder output. This intermediary absorbs the jitter and variable delays from the network, transforming them into regular, predictable input for the decoder.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system uses feedback from the primary data stream reception to control the processing rate of secondary streams. The virtual clock advances based on actual packet arrival patterns, creating a feedback loop that dynamically adjusts the decoding timeline to match actual network conditions, thereby maintaining synchronization without requiring complex external control systems.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9692537B2System, method, and apparatus for jitter reduction in a video decoder system
Publication Date: 2017.06.27 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9692537B2 patent drawing
  • US9692537B2 patent drawing
  • US9692537B2 patent drawing

AI summary

In one embodiment, there is presented a method for processing data. The method comprises receiving a bitstream, said bitstream comprising a first data stream and a second data stream, wherein the first data stream comprises data that is intended to be consumed at a substantially constant bit rate; and controlling the processing rate of the second data stream based at least in part on the rate of receipt of the first data stream.