Common Video Decoder Path for Multi-Format Signal Conversion

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Solution Overview

Problem

Existing video display and recording devices require separate subsystems for processing different video signal formats like VGA, RGB, and YPbPr, leading to increased complexity and power consumption.

Innovation Solution

A common subsystem and method that uses analog to digital converters to sample analog video signals at either fixed or variable frequencies, allowing the same hardware to process multiple formats, including over-sampling and decimation to achieve the desired digital pixel rate, thereby reducing circuitry and power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate subsystems are used for processing different video signal formats, then each format can be processed with dedicated circuitry optimized for its specific requirements, but the overall device complexity and power consumption increase

Engineering Contradiction:
Improveprocessing reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal video processing subsystem that can handle multiple video formats (VGA, RGB, YPbPr) through a single integrated architecture. The analog-to-digital converter is configured to accept different input formats and adjust its sampling frequency accordingly, while the digital processing pipeline remains common across all formats. This eliminates the need for separate dedicated subsystems for each video format, reducing device complexity while maintaining format-specific processing capabilities through software-controlled configuration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate subsystems are used for processing different video signal formats, then each format can be processed with dedicated circuitry, but the power consumption increases

Engineering Contradiction:
Improveprocessing reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent employs a universal processing subsystem that consolidates power consumption into a single shared infrastructure. Instead of maintaining multiple independent subsystems that would each consume power simultaneously, the system activates only the necessary processing paths based on the input format detected. The common digital processing pipeline and memory structures are shared across all formats, significantly reducing overall power consumption while ensuring reliable processing for each specific video format.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If a common subsystem is used to process different video formats, then circuitry and power usage are reduced, but the system must handle variable sampling frequencies and different signal characteristics

Engineering Contradiction:
Improvedevice complexityVSAvoidformat adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic adaptability within the common subsystem through a configurable analog-to-digital converter that can adjust its sampling frequency based on the detected video format. The system dynamically selects appropriate processing parameters and pipeline configurations for VGA, RGB, or YPbPr inputs. This dynamic reconfiguration capability allows the fixed hardware architecture to adapt to variable signal characteristics, maintaining format versatility while benefiting from the simplicity of a unified subsystem.

Inventive Principle:
Principle #15Dynamics

4Measurement precision

If analog video signals are over-sampled and then decimated, then the desired digital pixel rate is achieved, but additional processing stages are required

Engineering Contradiction:
Improvedigitization precisionVSAvoidprocessing stages
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies over-sampling as a preliminary action in the digitization process, capturing video signals at a higher sampling rate than the final output requires. This preliminary high-rate sampling improves measurement precision by capturing more signal detail and enabling better noise filtering. The subsequent decimation stage then reduces the sample rate to the desired pixel rate. By performing the precision-critical sampling operation first, the system achieves high-quality digitization while integrating the decimation function into the common processing pipeline, minimizing additional complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient conversion of various analog video signals into digital formats using less circuitry and power, while maintaining precision, and allowing for compatibility with multiple input formats.

Implementation Method 1

The each of the analog video signals are converted digital signals by a set of analog to digital converters which sample the signals at either a fixed frequency or a variable frequency

Methodology Applied
Scientific EffectAnalog to digital conversion:

Implementation Method 2

In some modes of operation, the analog video signals can be over-sampled and then processed by one or more decimators to reduce the number of samples to produce the desired digital video signal having the desired pixel data rate

Methodology Applied
Scientific EffectDecimation:

Data Source

PatentUS8878998B2Video decoder block
Publication Date: 2014.11.04 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8878998B2 patent drawing
  • US8878998B2 patent drawing
  • US8878998B2 patent drawing

AI summary

A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component cat be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.