Hardware Video Encoder Motion Estimation for Block Sizes
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Solution Overview
Problem
High Efficiency Video Coding (HEVC) requires efficient motion estimation for various block sizes within a coding tree unit (CTU), but existing fast algorithms with reduced computational complexity often compromise on compression efficiency and quality.
Innovation Solution
A hardware-based video encoder with multiple inter-picture prediction search processors performs coarse, refinement, and fractional pixel motion vector searches in parallel to determine motion vectors for different block sizes within a CTU, utilizing down-sampled and interpolated images to reduce complexity while maintaining high compression efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If exhaustive motion estimation search is performed for all block sizes, then compression efficiency and quality are improved, but computational complexity becomes very significant
Solution Approach 1:
The motion estimation process is segmented into multiple stages: a first stage performs coarse search at lower resolution for larger blocks, while a second stage performs refinement search at full resolution for smaller blocks. This segmentation allows different block sizes to be processed with appropriate search intensity, reducing overall computational complexity while maintaining compression efficiency.
Solution Approach 2:
Different search strategies are applied locally to different block sizes. Large blocks undergo coarse search at reduced resolution, while small blocks undergo refinement search at full resolution. This local differentiation optimizes the balance between computational complexity and compression efficiency for each block type.
2Device complexity
If fast motion estimation algorithms with reduced computational complexity are used, then device complexity is reduced, but compression efficiency and quality are degraded
Solution Approach 1:
The algorithm segments the motion estimation process into coarse search for large blocks and refinement search for small blocks. This segmentation enables the system to use simpler, faster algorithms for large blocks while applying more complex refinement only where necessary, thus reducing overall computational complexity while maintaining compression efficiency.
Solution Approach 2:
Instead of performing full refinement search for all block sizes, the patent applies refinement search partially only to smaller blocks where it is most needed. This partial application of the more complex algorithm achieves the necessary compression efficiency without the excessive computational complexity of applying it universally.
3Reliability
If motion estimation is performed for all block sizes within CTU, then coding efficiency is improved, but processing time increases significantly
Solution Approach 1:
The motion estimation process is segmented into two distinct stages with different resolution requirements. The first stage handles large blocks at lower resolution for speed, while the second stage handles small blocks at full resolution for accuracy. This segmentation significantly reduces processing time compared to uniform full-resolution search across all block sizes.
Solution Approach 2:
The patent changes the resolution parameter dynamically based on block size. Larger blocks are processed at reduced resolution in the first stage, while smaller blocks are processed at full resolution in the second stage. This parameter change enables efficient processing of all block sizes without uniformly high computational cost.
Data Source
AI summary
A hardware video encoder includes a first inter-picture prediction search processor to perform at least one coarse search at a designated block size. The at least one coarse search utilizes a down-sampled version of an image to determine motion vectors. A second inter-picture prediction search processor performs motion vector refinement searches on pixels of the image for multiple block sizes. Searches of at least one block size utilize the motion vectors. A third inter-picture prediction search processor performs fractional pixel motion vector refinement searches on interpolated values of the pixels of the image for multiple block sizes in parallel.