Video Encoding Pipeline on a Coprocessor for Higher Throughput

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Solution Overview

Problem

Existing video encoding techniques face challenges in improving throughput while maintaining cost-effectiveness, as enhancing latency often comes at a high cost.

Innovation Solution

A method utilizing a coprocessor for parallel processing through pipelining, specifically configuring a coprocessor to perform discrete functions of the encoding process in parallel, including processes such as conversion, downsampling, and enhancement layer encoding, with synchronization primitives to manage shared resources and prioritize processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional sequential encoding processes are used, then device complexity is reduced, but throughput is limited

Engineering Contradiction:
ImprovethroughputVSAvoidprocessing architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The encoding process is divided into multiple independent stages (conversion, filtering, downsampling, base encoding, enhancement encoding) that can be executed in parallel. Each stage processes different data blocks simultaneously, enabling throughput improvement without requiring a completely new device architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-threaded processing to parallel multi-threaded processing by utilizing GPU architecture. This dimensional change in processing approach allows multiple encoding operations to occur simultaneously, dramatically increasing throughput while maintaining cost-effectiveness through existing hardware capabilities.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If latency is improved to increase throughput, then throughput increases, but cost increases

Engineering Contradiction:
ImprovethroughputVSAvoidcost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent utilizes the GPU's parallel processing architecture to create multiple processing threads that operate simultaneously on different data blocks. This copying of processing logic across multiple threads enables throughput improvement without requiring additional expensive dedicated encoding hardware for each stream.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The GPU coprocessor is configured to perform multiple discrete encoding functions (conversion, filtering, downsampling, base encoding, enhancement encoding) within a single universal processing platform. This multi-functionality allows the system to achieve high throughput across various encoding operations without requiring separate specialized hardware for each function, thereby controlling costs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260032273A1Data processing in a encoding process
Publication Date: 2026.01.29 V NOVA INT LTD
  • US20260032273A1 patent drawing
  • US20260032273A1 patent drawing
  • US20260032273A1 patent drawing

AI summary

There is provided a method of processing data as part of an encoding process for video data. The method comprising configuring a coprocessor to process data in parallel using pipelining. The pipelining being configured according to a processing scheme which comprises a plurality of processes that each perform a discrete function of the encoding process for video data. The data comprises a plurality of processing units. The method further comprises processing the data at the coprocessor so that the plurality of processing units are each processed by a corresponding one of the plurality of processes in parallel.