Video Encoding Memory Management for Bandwidth Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current image processing technologies for high-resolution images, such as UHD, face inefficiencies in memory management and bandwidth usage during inter and intra encoding, as they cannot effectively reuse data and coding information across frames, leading to suboptimal performance in video codec applications.

Innovation Solution

The proposed solution involves a processing apparatus that manages a separate first memory and a second memory within a processor, allowing only partial regions of reference frames to be loaded into the second memory for encoding, thereby reducing memory capacity and bandwidth requirements by efficiently storing and reusing reference pixels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If all reference frame data is loaded into the second memory for encoding, then encoding performance is improved, but memory capacity and bandwidth requirements increase

Engineering Contradiction:
Improveencoding performanceVSAvoidmemory capacity and bandwidth
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent divides the reference frame data into multiple blocks and selectively loads only the necessary blocks into the second memory based on the encoding mode (intra or inter) and position of the current block being processed. This segmentation approach allows the system to maintain high encoding performance by having required data readily available in fast memory, while avoiding the need to load entire reference frames, thus reducing memory capacity and bandwidth requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements partial action by loading only the specific portions of reference frame data that are actually needed for the current encoding operation into the second memory. Instead of loading complete reference frames, the system loads minimal necessary data blocks, achieving sufficient encoding performance with reduced memory usage and bandwidth consumption.

Inventive Principle:
Principle #16Partial or excessive action

2Quantity of substance

If reference frame data is stored in the first memory only, then memory capacity requirements are reduced, but access speed and encoding efficiency decrease

Engineering Contradiction:
Improvememory capacityVSAvoidaccess speed and encoding efficiency
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent extracts the most frequently accessed reference frame data blocks from the first memory and loads them into the second memory (fast memory) when needed. This extraction of critical data to faster storage maintains high access speed and encoding efficiency, while the majority of reference frame data remains in the first memory, keeping overall memory capacity requirements manageable.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The second memory acts as an intermediary buffer between the first memory and the processing units. It temporarily holds the specific reference frame blocks that are currently being processed, providing fast access without requiring the entire first memory to be continuously accessed at high speed, thus balancing access efficiency with memory capacity usage.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If sequential row-by-row encoding is performed, then processing order is simplified, but data reuse efficiency across rows decreases

Engineering Contradiction:
Improveprocessing order simplicityVSAvoiddata reuse efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent introduces dynamic adaptability to the encoding process by adjusting the data loading strategy based on the current encoding position and mode. When processing moves from one row to another, the system dynamically determines which reference frame blocks to load into the second memory, optimizing data reuse efficiency while maintaining the simplicity of sequential processing through flexible memory management rather than changing the fundamental processing order.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3494699B1Processing apparatuses
Publication Date: 2022.07.27 SAMSUNG ELECTRONICS CO LTD
  • EP3494699B1 patent drawingFigure 1
  • EP3494699B1 patent drawingFigure 2
  • EP3494699B1 patent drawingFigure 3~5a

AI summary

A processing apparatus has a processor including a first memory. The processor divides a frame in video content into a plurality of coding units (CUs), and encodes the plurality of CUs in a diagonal direction to generate an encoded frame, wherein when a first CU is encoded based on a first encoding type, the processor is further configured to load, from a second memory, a first partial region of a reference frame corresponding to first position information of the first CU to the first memory and encode the first CU based on the first partial region of the reference frame loaded from the second memory, and wherein, when the first CU is encoded based on a second encoding type, the processor is further configured to encode the first CU based on a first reference pixel value corresponding to the first position information of the first CU from the first memory.