Video Hardware Engine Scrambler for Ultra-HD Power Efficiency
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Solution Overview
Problem
Current video hardware engines face challenges in efficiently processing ultra-HD video due to high computational complexity and power consumption, particularly in mobile devices, where they require significant computation power and multi-format support while maintaining low power usage.
Innovation Solution
A video hardware engine design that includes a video hardware accelerator unit, shared memory, vDMA engine, and a scrambler, which processes frames by dividing them into largest coding units (LCUs) and scrambling them into blocks for efficient processing, reducing the need for parsing and improving hardware utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a hardwired solution is used to meet huge computation power requirements for ultra-HD video processing, then processing capability is improved, but power consumption increases
Solution Approach 1:
The video processing system is divided into multiple functional modules including vDMA engine for memory management, scrambler for data reorganization, and video hardware accelerator unit for parallel processing. Each module handles specific tasks independently, enabling efficient resource utilization and reduced power consumption while maintaining high processing capability for ultra-HD video at 60fps
Solution Approach 2:
The system employs dynamic resource allocation where the video hardware engine can be configured via firmware to support multiple video formats and standards (MPEG1/2/4, H.261/3/4/5, VP6/7/8, etc.). This dynamic reconfigurability allows the hardwired architecture to adapt to different processing requirements without physical hardware changes, optimizing power usage based on actual workload demands
2Adaptability or versatility
If a fully programmable solution is used to support multiple video formats, then adaptability is improved, but processing speed and efficiency deteriorate
Solution Approach 1:
The video hardware engine is designed as a universal platform that can process multiple video formats and standards through firmware configuration. The hardwired architecture includes configurable modules that can be programmed to support MPEG1/2/4, H.261/3/4/5, VP6/7/8, and other formats, providing multi-functionality without sacrificing processing speed
Solution Approach 2:
The system replaces fully programmable software-based video processing with a hardwired hardware engine that uses dedicated circuitry for video decoding and encoding operations. This substitution of mechanical/programmable systems with hardwired logic provides faster processing speeds while maintaining format versatility through configurable hardware modules
3Ease of operation
If video frames are processed without scrambling, then processing simplicity is maintained, but hardware utilization efficiency deteriorates
Solution Approach 1:
The scrambler performs preliminary reorganization of video data into an optimized format before processing by the video hardware accelerator unit. By pre-processing the video frames to arrange pixels and blocks in a favorable pattern, the system improves hardware utilization efficiency without significantly complicating the overall processing pipeline
Data Source
AI summary
A low power video hardware engine is disclosed. The video hardware engine includes a video hardware accelerator unit. A shared memory is coupled to the video hardware accelerator unit, and a scrambler is coupled to the shared memory. A vDMA (video direct memory access) engine is coupled to the scrambler, and an external memory is coupled to the vDMA engine. The scrambler receives an LCU (largest coding unit) from the vDMA engine. The LCU comprises N×N pixels, and the scrambler scrambles N×N pixels in the LCU to generate a plurality of blocks with M×M pixels. N and M are integers and M is less than N.