Video Processor Memory-Path Decompression for Lower Bandwidth Demand
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Solution Overview
Problem
Existing video processors face inefficiencies in managing bandwidth and storage requirements due to the need for data compression and decompression between on-chip and off-chip memory, particularly during video processing operations like motion compensation and motion estimation.
Innovation Solution
Integrating a decoding unit within the memory access path of the video processor's processing core to perform local decompression of data as it is read into the requestor unit, allowing for efficient decompression and compression of data within the chip, thereby reducing bandwidth and storage demands.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in compressed format in off-chip memory to reduce bandwidth and storage requirements, then bandwidth and storage efficiency is improved, but decompression time and processing complexity increases
Solution Approach 1:
The patent applies preliminary action by performing decompression in advance within the video processor's memory access path. The decoding unit decompresses compressed video data from off-chip memory before the data is needed by processing elements, so that uncompressed data is readily available when required for video processing operations, eliminating decompression delays during critical processing paths.
Solution Approach 2:
The patent introduces an intermediary decoding unit positioned between the memory interface and processing elements. This decoding unit acts as a mediator that receives compressed data from off-chip memory, decompresses it, and provides uncompressed data to processing elements, thereby resolving the contradiction between storing compressed data for efficiency and needing uncompressed data for processing.
2Productivity
If a decoding unit is integrated within the memory access path to perform local decompression, then processing efficiency is improved, but device complexity increases
Solution Approach 1:
The patent merges the decoding unit with the existing memory access path infrastructure of the video processor. Rather than adding a completely separate decompression system, the decoding unit is integrated into the memory interface architecture, sharing control logic and data pathways with existing memory access mechanisms, thereby improving processing efficiency while minimizing the increase in overall device complexity.
Data Source
AI summary
A video processor (video processing unit, ‘VPU’) is provided having one or more processing cores, wherein a processing core comprises a respective memory interface and at least one requestor unit that is operable to issue memory transaction requests to such memory interface. The requestor unit has a respective, dedicated decoding unit that is operable to (at least) decompress data as and when it is read in to the requestor unit and to provide an uncompressed view of the data to a memory access circuit internal to the requestor unit.