Video Processor Buffer Stage Value for Irregular Input Timing

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Solution Overview

Problem

Conventional video processors face challenges in handling irregular input frames, leading to image jitter and abnormal movement in output videos due to unpredictable delays and timing interference from CPU or GPU, especially when converting lower frame rate videos to higher frame rates.

Innovation Solution

A video processor method that calculates a buffer stage value to dynamically select the appropriate frame set and recalculate the phase step for interpolation, adapting to irregular input timing by monitoring the frame buffer status and adjusting phase coefficients to minimize the impact of delays and overflows.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the video processor uses a reference table to determine frame sets and phase coefficients for interpolation, then the interpolation process is simple and efficient, but the output video exhibits image jitter and abnormal movement when input frames are delayed or irregular

Engineering Contradiction:
Improveinterpolation efficiencyVSAvoidoutput video stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent makes the frame set selection and phase coefficient determination dynamic by introducing a buffer stage value that changes based on input frame arrival timing. Instead of using fixed table lookups, the system dynamically selects frame sets (e.g., {current, previous} or {current, previous, previous}) and calculates phase coefficients based on the current buffer stage value, allowing adaptation to irregular input timing while maintaining processing efficiency

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system implements feedback by continuously monitoring the buffer stage value (which reflects input frame timing status) and using this information to adjust frame set selection and phase coefficient calculation in real-time. This feedback mechanism enables the system to detect and respond to input delays, preventing image jitter by adapting the interpolation parameters based on actual buffer conditions

Inventive Principle:
Principle #23Feedback

2Measurement precision

If the video processor waits for delayed input frames before performing interpolation, then the accuracy of frame selection improves, but the output frame generation is delayed causing video timing issues

Engineering Contradiction:
Improveframe selection accuracyVSAvoidoutput frame delay
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing multiple frame sets in advance (e.g., {current, previous}, {current, previous, previous}) and pre-determining corresponding phase coefficients. When an input frame arrives, the system quickly selects the appropriate pre-prepared frame set based on the buffer stage value, avoiding the need to wait for delayed frames while maintaining accurate frame selection for interpolation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts which pre-prepared frame set to use based on the buffer stage value. When input frames arrive on time, it uses the standard frame set; when delays occur, it switches to alternative frame sets from the pre-calculated options, enabling continuous output generation without timing delays while adapting to actual input conditions

Inventive Principle:
Principle #15Dynamics

3Device complexity

If the video processor uses a fixed phase step for interpolation, then the calculation process is simple and fast, but the output video exhibits abnormal movement when input timing is irregular

Engineering Contradiction:
Improvephase calculation complexityVSAvoidvideo playback smoothness
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the phase step parameter dynamically based on the buffer stage value. Instead of using a fixed phase step (e.g., 2/5), the system adjusts the phase step according to the current buffer conditions - using different phase steps for different buffer stages. This parameter adaptation maintains calculation simplicity through discrete values while ensuring smooth video playback under varying input timing conditions

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11871146B1Video processor for handling irregular input
Publication Date: 2024.01.09 NOVATEK MICROELECTRONICS CORP
  • US11871146B1 patent drawing
  • US11871146B1 patent drawing
  • US11871146B1 patent drawing

AI summary

A video processor is configured to perform the following steps: receiving a series of input frames; calculating a buffer stage value according to the series of input frames, wherein the buffer stage value corresponds to a status of the input frames stored in a frame buffer of the video processor; and selecting a frame set from the input frames stored in the frame buffer for generating an interpolated frame as an output frame to be output by the video processor according to the buffer stage value.