Video Processor Synchronization Using Scanline Buffers

Solution Overview

Problem

Existing video processing systems face challenges in synchronizing multiple video streams, leading to undesirable pixel offsets during mixing, which is costly and difficult to implement in real-time, especially for high-resolution video.

Innovation Solution

A video processor-based method that synchronizes input and output data streams by using input and output buffers to store pixels and applying synchronization adjustments based on timing information, such as horizontal sync signals, to produce a synchronized mixed video output stream.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the entire frame is buffered using external memory to perform mixing on the next frame, then pixel offset alignment is achieved, but memory requirements and processing complexity increase significantly

Engineering Contradiction:

Improvepixel offset alignmentVSAvoidexternal memory requirement

Core Design Contradiction:

Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent divides the video frame into multiple scanlines and processes them sequentially rather than buffering entire frames. This segmentation allows real-time processing of individual scanlines while maintaining synchronization, eliminating the need for large external memory buffers.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent determines timing information and applies synchronization adjustments to the buffer in advance before mixing operations. By pre-adjusting the buffer based on timing information from both video streams, the system achieves pixel-perfect alignment without needing to buffer entire frames in external memory.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If the entire frame is buffered using external memory to perform mixing on the next frame, then pixel offset alignment is achieved, but real-time processing capability deteriorates

Engineering Contradiction:

Improvepixel offset alignmentVSAvoidreal-time processing speed

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

The patent divides the video frame into multiple scanlines and processes them sequentially rather than buffering entire frames. This segmentation allows real-time processing of individual scanlines while maintaining synchronization, eliminating the need for large external memory buffers.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements continuous real-time processing by determining timing information and applying synchronization adjustments continuously as scanlines are processed. This continuous action maintains both pixel alignment and real-time processing capability simultaneously.

Inventive Principle:

Principle #20Continuity of useful action

3Duration of action of stationary object

If large amounts of video data are accessed in memory at 30 frames per second or more, then frame buffering is achieved, but system cost and complexity increase inordinately for high resolution video

Engineering Contradiction:

Improveframe buffering capabilityVSAvoidsystem implementation complexity

Core Design Contradiction:

Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the video frame into multiple scanlines and processes them sequentially rather than buffering entire frames. This segmentation allows real-time processing of individual scanlines while maintaining synchronization, eliminating the need for large external memory buffers.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent determines timing information and applies synchronization adjustments to the buffer in advance before mixing operations. By pre-adjusting the buffer based on timing information from both video streams, the system achieves pixel-perfect alignment without needing to buffer entire frames in external memory.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8704834B2Synchronization of video input data streams and video output data streams

Publication Date: 2014.04.22 NVIDIA CORP

AI summary

A method for synchronizing an input data stream with an output data stream in a video processor. The method includes receiving an input data stream and receiving an output data stream, wherein the input data stream and the output data stream each comprise a plurality of pixels. The method further includes sequentially storing pixels of the input data stream using an input buffer and sequentially storing pixels of the output data stream using an output buffer. Timing information is determined by examining the input data stream and the output data stream. A synchronization adjustment is applied to the input buffer and the output buffer in accordance with the timing information. Pixels are output from the input buffer and the output buffer to produce a synchronized mixed video output stream.