Video Reorder Buffer Controller Using FIFO Pointer Arrays
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Solution Overview
Problem
Video processing in mobile devices faces challenges due to high computational and memory bandwidth requirements, especially with increasing video resolutions, which can lead to power consumption issues and inefficient buffer utilization in real-time processing.
Innovation Solution
An integrated circuit with a video data reorder buffer and controller that uses a FIFO array of registers to efficiently store and retrieve video data blocks, assigning allocation units based on the order of release by outgoing data, optimizing buffer utilization and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If higher clock frequencies are used to improve video processing performance, then processing speed is improved, but power consumption increases
Solution Approach 1:
The video data buffer is segmented into multiple allocation units that can be independently managed. This allows the system to process video data in smaller, more efficient chunks rather than requiring large buffer allocations, reducing the computational overhead and power consumption associated with managing large memory structures while maintaining real-time processing capability.
2Manufacturing precision
If video resolution is increased to 4K and beyond, then video quality is improved, but computational burden and memory bandwidth requirements increase
Solution Approach 1:
The buffer is divided into multiple allocation units that can be independently allocated and managed. This segmentation allows the system to handle high-resolution video data more efficiently by processing it in manageable units, reducing the overall computational burden and memory bandwidth requirements while maintaining 4K and higher resolution capabilities.
Solution Approach 2:
The buffer allocation is made dynamic through the use of a reorder buffer controller that can allocate and deallocate buffer units in real-time based on the actual video processing needs. This dynamic allocation allows the system to adapt to varying video resolution requirements, optimizing resource usage for high-resolution content while avoiding the overhead of permanently allocated large buffers.
3Ease of manufacture
If traditional buffer allocation methods are used, then implementation simplicity is maintained, but buffer utilization efficiency decreases
Solution Approach 1:
The reorder buffer controller implements feedback mechanisms to monitor buffer usage and dynamically adjust allocation unit assignments. This feedback-driven approach maintains relatively simple implementation while significantly improving buffer utilization efficiency by ensuring that buffer resources are allocated based on actual processing needs rather than static pre-allocation schemes.
Data Source
AI summary
In some embodiments, distributed video reorder buffers of a video (e.g. HEVC, H.265) encoder/decoder each include a circular FIFO array of pointers to buffer allocation units, and control logic which assigns allocation units to incoming video data in an order that allocation units are released by outgoing video data. The assignment order allows increased buffer utilization and lower buffer sizes, which is of increased importance for relatively large (e.g. 64×64, 32×32) video blocks, as supported by HEVC encoding/decoding.