Video Transcoding Engine Bypasses Server RAM for Lower Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current video streaming transcoding methods involve multiple memory transfers between server and GPU, leading to increased latency and power consumption due to the need for memory write, read, and copy operations.
Innovation Solution
A method where a video transcoding engine integrated with a host server receives encoded video streams directly and performs transcoding using an FPGA or ASIC, transferring transcoded files directly to non-volatile memory, bypassing volatile server memory, thereby reducing memory bandwidth and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If video transcoding is performed using traditional server memory transfer methods, then transcoding functionality is achieved, but latency and power consumption increase due to multiple memory write, read, and copy operations
Solution Approach 1:
The patent extracts the video transcoding function from the traditional server processing path and implements it in a separate FPGA device. This extraction eliminates the need for multiple memory transfers between server RAM and GPU, as the FPGA directly receives video streams and outputs transcoded files without intermediate memory copies, thereby reducing latency and simplifying the memory transfer operations.
Solution Approach 2:
The FPGA acts as an intermediary device between the video stream source and the final output. It receives encoded video streams, performs transcoding operations, and directly writes output files without requiring the server to intermediate the data transfer through its memory system. This intermediary approach eliminates the harmful memory write-read-copy cycle while maintaining full transcoding functionality.
2Productivity
If multiple memory transfers are performed for video transcoding, then transcoding is completed, but power consumption increases
Solution Approach 1:
By extracting the transcoding workload from the server's CPU-GPU memory path and placing it in the FPGA, the patent eliminates multiple high-power memory transfer operations. The FPGA's integrated architecture performs transcoding with minimal memory access, significantly reducing power consumption while maintaining or improving transcoding throughput through parallel processing capabilities.
Solution Approach 2:
The patent replaces the traditional server-based software transcoding mechanism (which relies on heavy memory I/O) with a hardware-based FPGA implementation. This substitution uses dedicated logic circuits and parallel processing units within the FPGA to perform transcoding operations directly, eliminating the need for repeated memory transfers and associated power consumption while preserving productivity.
3Speed
If video streams are processed through server memory, then data access is enabled, but memory bandwidth is consumed and latency increases
Solution Approach 1:
The FPGA serves as an intermediary that bypasses the server's volatile memory system entirely. It directly captures video streams from the source and writes transcoded output directly to storage or network interfaces, eliminating the need to load entire video streams into server RAM. This approach maintains fast data access speed while dramatically reducing memory bandwidth consumption by avoiding unnecessary read-write cycles.
Solution Approach 2:
The FPGA performs preliminary transcoding processing in real-time as video streams arrive, rather than waiting for complete video files to be loaded into server memory. This preliminary action enables continuous processing with minimal memory buffering requirements, improving data access speed while reducing the quantity of memory bandwidth needed compared to traditional batch processing methods.
Data Source
AI summary
A method for transcoding an encoded video stream uploaded to a host server that includes a video transcoding engine connected to the server. At least one processor of the video transcoding engine receives an encoded video stream from a client computing device in which the encoded video stream is directly received by the video transcoding engine connected to the host server and the video transcoding engine has direct access to a non-volatile memory of the host server. The at least one processor of the video transcoding engine generates one or more transcoded files in real-time from the encoded video stream. The at least one processor transfers the one or more transcoded video files from the video transcoding engine directly to the non-volatile memory of the host server.