Virtualized Interrupt Descriptor Tables for Secure Low-Latency Handling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional operating systems are vulnerable to malware attacks that elevate privilege levels, making it difficult to detect and remove malware, especially in virtualized environments where compromise in one virtual machine can risk others, and existing solutions cause system latency during interrupt handling.
Innovation Solution
The implementation of virtualized interrupt descriptor tables (VIDTs) with explicit permission view switch instructions and stubs to manage and switch permission views efficiently, reducing system latency and enhancing protection by allowing secure access to interrupt handlers without causing access violations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional privilege-based protection schemes are used to protect critical system regions, then security against malware attacks is improved, but system latency increases during interrupt handling
Solution Approach 1:
The patent introduces permission view switch instructions as an intermediary mechanism between the interrupted code and the interrupt handler. This mediator allows the system to temporarily switch permission views to enable interrupt handler execution without requiring full privilege level changes, thus maintaining security while reducing latency.
Solution Approach 2:
The patent changes the permission view parameter dynamically during interrupt handling. By switching permission views rather than privilege levels, the system can grant temporary access to critical regions needed for interrupt processing, then revert to the original state, reducing the time critical regions are exposed while maintaining security.
2Ease of operation
If privilege levels are elevated to handle interrupts, then interrupt handling capability is improved, but vulnerability to malware attacks increases
Solution Approach 1:
The permission view switch instruction acts as an intermediary that provides the necessary access rights for interrupt handling without elevating privilege levels. This allows interrupt handlers to access critical regions when needed while preventing malware from gaining sustained high-privilege access that would enable system compromise.
Solution Approach 2:
The patent makes permission views dynamic and temporary, switching them only during the brief period when interrupt handling requires access to critical regions. This dynamic approach ensures that even if malware is present, it cannot exploit static high-privilege access, as the elevated permissions exist only transiently during legitimate interrupt processing.
3Productivity
If access permission is granted to interrupt handlers, then interrupt processing is enabled, but access violations occur in protected regions
Solution Approach 1:
The patent changes the permission view parameter temporarily to allow interrupt handler access to protected regions, then reverts it afterward. This parameter switching mechanism enables efficient interrupt processing while maintaining the stability and protection of critical regions during normal operation, preventing access violations.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
Various embodiments of this disclosure may describe method, apparatus and system for reducing system latency caused by switching memory page permission views between programs while still protecting critical regions of the memory from attacks of malwares. Other embodiments may be disclosed and claimed.