Normalized Verification IP Framework for SOC Integration
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Solution Overview
Problem
The integration of third-party IP components into system-on-a-chip (SOC) designs often results in gaps in functionality and control, leading to resource-intensive and time-consuming testing processes, as well as the need for device-specific drivers and software rewrites, due to the lack of a standardized programming model that can capture design-specific register accesses.
Innovation Solution
A normalized framework for verification IP (VIP) is developed, allowing for the creation of a software stack that manages both protocol-centric and design-specific behaviors, enabling the VIP to simulate the IP component without requiring the complete physical DIP, and facilitating SOC development with a unified programming model.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional programming model is used for third-party IP components, then protocol-related register accesses can be verified, but design-specific register accesses cannot be captured, requiring device-specific drivers and complete re-testing when changes occur
Solution Approach 1:
The programming model is segmented into two distinct parts: a standardized protocol-related section that handles common register accesses, and a design-specific section that captures IP-component特有的 register accesses. This segmentation allows each part to be developed and verified independently, reducing overall complexity while maintaining verification completeness.
Solution Approach 2:
The invention creates a universal programming model framework that can handle both protocol-related and design-specific register accesses through a unified interface. The design-specific register access definition extends the standardized model, allowing the same programming model structure to serve multiple purposes without requiring separate device-specific drivers.
2Productivity
If IP components are integrated into SOC designs with standardized programming models, then software development is facilitated, but gaps in functionality and control remain, requiring resource-intensive testing
Solution Approach 1:
The design-specific register access definition is created and integrated into the programming model during the IP component design phase, before SOC integration and software development. This preliminary action ensures that all functionality and control aspects are predefined and documented, enabling early verification and eliminating the need for resource-intensive testing later in the development cycle.
3Reliability
If device-specific drivers are created to capture design-specific register accesses, then complete testing can be achieved, but development becomes error-prone and time-consuming
Solution Approach 1:
The invention merges the protocol-related register access handling and design-specific register access handling into a single unified programming model. This consolidation eliminates the need for separate device-specific drivers, as the programming model itself captures all necessary register accesses. The unified model is easier to maintain and less error-prone while achieving complete testing coverage.
Data Source
AI summary
Using verification IP (VIP), the related design IP (DIP) can be integrated into a system on a chip (SOC) without requiring the IP component. Using a normalized framework, a software module can be integrated into the VIP software stack enabling the customized management of the VIP beyond the standard specification defined behaviors. Then, the modified software stack can be used to manage both behaviors defined by the specification and the design specific behaviors. The VIP can then be used in place of the DIP for SOC development.