Virtio Onload Interrupt Moderation for Low-Latency VM Data Paths

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Solution Overview

Problem

Existing interrupt moderation schemes in computing environments, particularly in virtual machines, suffer from inefficiencies such as asynchronous updates leading to latency, race conditions causing false interrupts, and the need for polling across multiple VMs, which affects packet processing and increases latency.

Innovation Solution

Implement a Virtio standard system with a virtualizer interrupt moderation library that monitors current interrupt values and packet statistics, allowing dynamic adjustment of interrupt rates through an accelerator driver, thereby reducing the need for kernel involvement and eliminating race conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If interrupt moderation parameters are updated asynchronously in host memory, then device memory updates are delayed, but this causes the device to be unaware of parameter changes and increases latency

Engineering Contradiction:
Improveinterrupt latencyVSAvoidparameter consistency
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent introduces a shared memory region as an intermediary between host and device, with specific registers (INT_MOD_EN, INT_MOD_NUM, INT_MOD_IDX) that allow synchronized parameter updates. The device can atomically read these registers to obtain consistent interrupt moderation parameters without relying on asynchronous memory updates, thus reducing latency while maintaining parameter consistency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The host writes interrupt moderation parameters to predetermined registers in the device before the device needs them. This preliminary action ensures that when the device reads the parameters, they are already available and consistent, eliminating the latency caused by waiting for asynchronous memory updates.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If device periodically reads parameters over PCI fabric, then device can obtain parameter values, but this slows interrupt generation process and affects packet processing flow

Engineering Contradiction:
Improveparameter availabilityVSAvoidinterrupt generation speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces the mechanical PCI fabric communication with direct memory-mapped I/O to shared memory. Instead of periodic reads over the slow PCI fabric, the device can efficiently access interrupt moderation parameters through direct memory access to the shared memory region, significantly improving interrupt generation speed while maintaining parameter availability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If interrupt moderation is implemented in guest drivers, then interrupt rates can be controlled, but race conditions may cause false interrupts or interrupt delays

Engineering Contradiction:
Improveinterrupt control flexibilityVSAvoidinterrupt accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements interrupt moderation directly in the device firmware, making the device self-sufficient in managing its own interrupt rates. The device autonomously reads parameters from shared memory registers and applies them without requiring guest driver intervention, eliminating race conditions while maintaining the flexibility to adapt interrupt rates based on workload.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The shared memory registers act as an intermediary that provides a race-condition-free mechanism for parameter communication. The host writes to these registers, and the device reads them atomically, ensuring consistent parameter values without the race conditions that occur when multiple software components try to modify parameters simultaneously.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If driver notifications are disabled, then interrupt moderation can be enforced, but device must poll thousands of indices across hundreds to thousands of VMs, increasing latency

Engineering Contradiction:
Improveinterrupt moderation enforcementVSAvoidpolling latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Instead of requiring the device to poll all possible indices across all VMs, the patent uses interrupt moderation parameters to limit the device's interrupt handling to only the necessary subset of work items. The INT_MOD_NUM register specifies the number of work items to process, and INT_MOD_IDX specifies the starting index, allowing the device to process only the required portion without excessive polling.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The host preliminarily determines and configures the interrupt moderation parameters (number of work items, starting index) before the device needs to process interrupts. This preliminary configuration allows the device to immediately begin processing the correct subset of work items without needing to poll through unnecessary indices, reducing polling latency while maintaining reliable interrupt moderation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250265107A1Interrupt moderation onload for accelerated data paths
Publication Date: 2025.08.21 MELLANOX TECHNOLOGIES LTD(IL)
  • US20250265107A1 patent drawing
  • US20250265107A1 patent drawing
  • US20250265107A1 patent drawing

AI summary

Systems and methods herein are for use with a Virtio standard and include at least one circuit to host a virtualizer component that enables different virtual machines (VMs), an accelerator driver, and a virtualizer interrupt moderation library, where the accelerator driver can be associated with an accelerator device. The accelerator driver can monitor interrupts associated with the different VMs to determine at least a current interrupt value and packet statistics that may be used by the virtualizer interrupt moderation library as a basis to provide an intended interrupt value to be used by the accelerator device for managing further interrupts to the different VMs.