Virtual Address Table for PIMD Memory Arrays
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Solution Overview
Problem
Traditional compiler techniques for generating object files are inadequate for machine-level instructions that operate in memory arrays, as they require transferring operands to external registers, which is inefficient and limits flexibility in relocatable applications.
Innovation Solution
The implementation of a Performed-In-Memory Device (PIMD) address table (PAT) that provides a virtual address abstraction layer, allowing compilers to access machine-level PIMD instructions without transferring operands to external registers, by generating object files with indexed address elements that are populated with virtual addresses at runtime.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional compiler techniques are used to generate object files with register-based addressing, then the object files are compatible with conventional processors, but the execution efficiency deteriorates due to required operand transfers to external registers
Solution Approach 1:
The patent introduces a virtual address table as an intermediary data structure that maps virtual addresses to physical memory locations. This table serves as a mediator between the compiler-generated code and the memory array, enabling direct memory access without requiring traditional register transfers. The virtual address table contains indexed address elements that are populated with virtual addresses at compile time, allowing the PIMD instruction to efficiently locate and operate on operands directly in memory.
2Adaptability or versatility
If operands are transferred to external registers for processing, then the processing can be performed by functional units, but the operational flexibility deteriorates due to fixed register locations at compile time
Solution Approach 1:
The patent extracts the address translation function from the traditional register-based processing pipeline and implements it directly within the memory device. By taking out the operand transfer step entirely and performing operations directly on memory arrays using PIMD instructions with virtual address indexing, the system eliminates the time loss associated with moving data between memory and external registers while maintaining full relocatability of applications.
3Ease of operation
If manual memory allocation is required for relocatable applications, then the address management can be controlled, but the ease of operation deteriorates due to manual allocation requirements
Solution Approach 1:
The patent implements a self-service mechanism where the virtual address table automatically manages address mapping and translation. The indexed address elements are populated with virtual addresses at compile time, and the runtime system automatically resolves physical addresses through the table without requiring manual memory allocation or intervention. This self-service approach simplifies operation while the underlying table structure handles the complexity of address management.
Data Source
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AI summary
The present disclosure includes apparatuses and methods related to virtual address tables. An example method comprises generating an object file that comprises: an instruction comprising a number of arguments; and an address table comprising a number of indexed address elements. Each one of the number of indexed address elements can correspond to a virtual address of a respective one of the number of arguments, wherein the address table can serves as a target for the number of arguments. The method can include storing the object file in a memory.