Virtual APIC Remapping for VM Interrupt Efficiency

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Solution Overview

Problem

Conventional virtual machine monitors (VMMs) face inefficiencies in processor cycle usage due to frequent switching between guest software and VMMs when handling interrupts and exceptions, leading to suboptimal performance in virtual machine environments.

Innovation Solution

The virtualization of the Advanced Programmable Interrupt Controller (APIC) using control structures and logic, allowing multiple virtual machines to access the APIC in a time-sliced manner, with hardware and microcode mechanisms to remap and validate access requests, ensuring efficient and correct operation even without instruction cache inclusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional VMM switches control between guest software and VMM for handling interrupts, then proper operation and protection are achieved, but processor cycle efficiency deteriorates

Engineering Contradiction:
Improveproper operation of guest softwareVSAvoidprocessor cycle efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a virtual APIC as an intermediary layer between the hardware APIC and guest software. The virtual APIC intercepts and handles interrupt-related memory accesses, allowing guest software to operate independently without frequent VMM intervention. This mediator enables the guest to manage its own interrupts while the VMM maintains ultimate control, resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If VMM receives control for every interrupt to maintain protection, then security and control are ensured, but system performance deteriorates

Engineering Contradiction:
Improveprotection between guest softwareVSAvoidtime spent in VMM switching
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the interrupt handling functionality by separating it into three layers: hardware APIC (physical interrupts), virtual APIC (virtualized interrupt management), and guest software (application-level handling). This segmentation allows each layer to operate independently within its domain, enabling guest software to handle interrupts without VMM context switching while the VMM retains oversight for security and protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The virtual APIC enables guest software to self-service interrupt handling by providing autonomous access to interrupt control structures. Guest software can independently configure and respond to interrupts through the virtual APIC interface without requiring VMM intervention, thereby eliminating time losses from frequent context switches while maintaining protection through the virtualization layer.

Inventive Principle:
Principle #25Self-service

3Productivity

If multiple virtual machines access the APIC concurrently, then system utilization improves, but access conflicts and correctness issues arise

Engineering Contradiction:
Improveprocessor resource utilizationVSAvoidaccess correctness to APIC
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent creates a virtual copy of the APIC for each virtual machine. Instead of having multiple VMs share and compete for access to a single physical APIC, each VM has its own virtual APIC instance that mirrors the functionality of the physical device. This copying approach allows concurrent access by multiple VMs without conflicts, as each operates on its own isolated virtual instance while the physical APIC resources are time-sliced or virtualized appropriately.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9619412B2Enabling virtualization of a processor resource
Publication Date: 2017.04.11 INTEL CORP
  • US9619412B2 patent drawing
  • US9619412B2 patent drawing
  • US9619412B2 patent drawing

AI summary

In one embodiment, a processor includes an access logic to determine whether an access request from a virtual machine is to a device access page associated with a device of the processor and if so, to re-map the access request to a virtual device page in a system memory associated with the VM, based at least in part on information stored in a control register of the processor. Other embodiments are described and claimed.