Virtual Block Bitmap Tracking for Read Disturbance Control

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Solution Overview

Problem

Memory systems experience read disturbance overestimation due to excessive tracking of read operations, leading to unnecessary refresh operations, increased wear, and reduced performance.

Innovation Solution

Implementing a bitmap for each virtual block to track read operations across memory dies, adjusting read counters only when all dies within the block have been read, thereby reducing the frequency of refresh operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If read operations are tracked for each memory die individually, then read disturbance is accurately monitored, but read counter overestimation occurs leading to excessive refresh operations

Engineering Contradiction:
Improveread disturbance tracking accuracyVSAvoidmemory system performance
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent merges the tracking of read operations across multiple memory dies by implementing a virtual block structure that groups multiple physical blocks from different dies. This consolidation allows the system to monitor read disturbances at the virtual block level rather than individually for each die, preventing overestimation while maintaining accurate monitoring.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The virtual block structure serves multiple functions simultaneously: it tracks read operations across different dies, manages refresh operations at the virtual block level, and prevents read disturbance overestimation. This multi-functionality resolves the contradiction by providing accurate monitoring without the overhead of individual die tracking.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If refresh operations are performed frequently to prevent read disturbance, then data reliability is improved, but unnecessary refresh operations increase wear and reduce performance

Engineering Contradiction:
Improvedata integrityVSAvoidmemory cell wear
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent implements a feedback mechanism where read counters at the virtual block level provide information about actual read disturbance patterns. This feedback allows the system to perform refresh operations only when genuinely needed, based on actual read activity across the virtual block, rather than using fixed or overly conservative refresh schedules.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The refresh operation strategy is made dynamic by adjusting refresh timing and frequency based on actual read counter values at the virtual block level. This dynamic approach ensures data reliability by refreshing only when read disturbance thresholds are approached, while avoiding unnecessary refresh operations that would increase wear.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If read counters are adjusted for each read operation, then read disturbance is tracked precisely, but latency increases due to excessive counter adjustments

Engineering Contradiction:
Improveread operation trackingVSAvoidoperation latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the memory system into virtual blocks that group multiple physical blocks from different dies. This segmentation allows read counter adjustments to be performed at the virtual block level rather than for each individual read operation on each die, reducing the frequency of counter adjustments while maintaining precise tracking of read disturbance patterns.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250383784A1Reducing read disturbance overestimation
Publication Date: 2025.12.18 MICRON TECHNOLOGY INC
  • US20250383784A1 patent drawing
  • US20250383784A1 patent drawing
  • US20250383784A1 patent drawing

AI summary

Methods, systems, and devices for reducing read disturbance overestimation are described. A memory system may maintain a bitmap associated with a virtual block, where the virtual block may be associated with first blocks across multiple dies and each bit of the bitmap may correspond to a respective first block of each die. The memory system may perform a first read operation at the first block of a first die and, accordingly, may set a first bit of the bitmap to a first value. The memory system may determine whether to adjust a read counter associated with the virtual block based on values within the bitmap. For example, the memory system may adjust the read counter based on determining that each bit of the bitmap is set to the first value or based on performing a second read operation on the first block of the first die.