Virtual Burst Mode Image Sensor Initialization

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Solution Overview

Problem

The existing method of programming image sensors through serial bus transactions is inefficient due to the need for numerous sequential bus transactions, which significantly prolongs the initialization process.

Innovation Solution

The method involves encoding and decoding non-sequential write commands to generate and transmit virtual burst write commands, allowing for efficient delivery of multiple commands through burst-mode transmission, reducing the time required for initialization and improving configuration efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple sequential bus transactions are performed to write default control values to image sensor registers, then each register can be configured individually, but the initialization time becomes considerably long

Engineering Contradiction:
Improveregister configuration accuracyVSAvoidinitialization time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent combines multiple sequential bus transactions into a single virtual burst-mode transaction. Multiple write commands with non-sequential addresses are merged into one transmission sequence, where the bus master device sends a series of address-data pairs in one continuous operation, significantly reducing the total number of bus transactions required for initialization

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent prepares multiple write commands in advance before transmission. The bus master device pre-assembles a sequence of address-data pairs for multiple registers, then transmits them all in one burst-mode operation. This preliminary preparation eliminates the need for sequential transaction setup, reducing initialization time while maintaining configuration accuracy

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple bus transactions are performed with preparation time between each transaction, then each command can be executed properly, but the total transmission time increases significantly

Engineering Contradiction:
Improvecommand execution reliabilityVSAvoidcommand transmission efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent enables continuous transmission of multiple write commands without interruption or preparation delays between commands. In burst-mode operation, the bus master device continuously transmits address-data pairs in sequence, eliminating idle preparation periods between transactions. This continuous action maintains reliability through proper protocol adherence while dramatically improving transmission efficiency

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent dynamically switches from sequential transaction mode to burst-mode transmission. The system adapts its operation mode based on the initialization requirements, using burst-mode for efficient bulk register writing while maintaining the ability to switch back to sequential mode if needed. This dynamic approach optimizes productivity without sacrificing reliability

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11567882B2Method and apparatus for delivering multiple commands through virtual burst-mode transmission and initialization of image sensor
Publication Date: 2023.01.31 HIMAX IMAGING LIMITED
  • US11567882B2 patent drawing
  • US11567882B2 patent drawing
  • US11567882B2 patent drawing

AI summary

A method for delivering multiple write commands is provided. The method includes: encoding data to be written and corresponding addresses in the multiple write commands to obtain encoded data and an encoded address, wherein the addresses are not sequential; generating a virtual burst write command according to the encoded data and the encoded addresses; and transmitting a virtual burst-mode start indicator and the virtual burst write command through a serial bus.