Virtual Clock Counter for Nominal-Frequency Timekeeping

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Solution Overview

Problem

Computing systems face challenges in accurately measuring time for different functions due to the use of multiple clocks operating at varying frequencies, leading to inaccuracies and cascading issues that affect performance and user experience.

Innovation Solution

A time data management system generates time data according to a nominal frequency based on an available frequency without requiring a dedicated hardware clock operating at the nominal frequency, using a counter to adjust increments based on the relationship between the two frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple clocks operating at different frequencies are used to satisfy different requirements, then the system can meet diverse functional needs, but hardware resource utilization increases and system complexity worsens

Engineering Contradiction:
Improvefunctional requirements satisfactionVSAvoidhardware resource utilization
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by making a single clock resource serve multiple functions through software-based frequency division. Instead of implementing separate hardware clocks for different frequencies, the system uses one physical clock with multiple virtual clock instances that can be configured to different frequencies via divider ratios, allowing one hardware resource to fulfill multiple timing requirements

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates virtual copies of clock functionality through software. Multiple virtual clock instances are generated from a single physical clock, each virtual clock appearing to operate at its own frequency while actually sharing the same hardware resource. This copying approach eliminates the need for multiple physical clocks while maintaining the illusion of multiple independent timing sources

Inventive Principle:
Principle #26Copying

2Adaptability or versatility

If multiple clocks are implemented to meet different frequency requirements, then various components can operate at optimal frequencies, but the system complexity and resource overhead increase

Engineering Contradiction:
Improvecomponent frequency optimizationVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamics by allowing the clock division ratios to be dynamically adjusted without hardware changes. The virtual clock frequencies can be modified by changing software parameters (divider ratios), enabling the system to adapt to different frequency requirements on-the-fly without reconfiguring physical hardware, thus reducing system complexity while maintaining adaptability

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If a dedicated hardware clock operating at nominal frequency is implemented, then time measurement accuracy at that frequency is improved, but hardware costs and system complexity increase

Engineering Contradiction:
Improvetime measurement accuracyVSAvoidhardware implementation cost
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a software intermediary layer between the physical clock and the application layer. This intermediary (the virtual clock mechanism with frequency dividers) translates the single physical clock signal into multiple virtual clock signals at different frequencies, maintaining time measurement accuracy for each nominal frequency without requiring dedicated hardware clocks for each frequency

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If multiple clocks operating at different frequencies are used, then different functions can be performed simultaneously, but timing inaccuracies and cascading issues arise

Engineering Contradiction:
Improveparallel function executionVSAvoidtiming accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent merges multiple clock functions into a single unified clock system. By combining the timing functions of what would traditionally be separate clocks into one physical clock with virtual frequency division, the system eliminates timing drift and synchronization issues between independent clocks while still enabling parallel function execution at different nominal frequencies

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12487627B1Configurable system counter based on a hardware clock frequency
Publication Date: 2025.12.02 AMAZON TECH INC
  • US12487627B1 patent drawing
  • US12487627B1 patent drawing
  • US12487627B1 patent drawing

AI summary

Systems and methods are provided to generate time data according to a nominal frequency and based on an available frequency. A hardware clock of the system can operate according to the available frequency. The system can identify a difference between the available frequency and a nominal frequency. Based on the difference, the system can generate time data according to the nominal frequency. To generate the time data, for each clock cycle of a plurality of clock cycles according to the available frequency, the system can determine whether to increment or maintain a value of the time data for a prior clock cycle of the plurality of clock cycles. The system can perform one or more functions based on the time data.