Virtual Command Queue Segmentation for Memory Invalidation

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Solution Overview

Problem

In virtualized environments, memory page table invalidations for multiple execution contexts are queued in a single physical command queue, leading to low performance due to contention and delays caused by the hypervisor trapping invalidation requests, which negatively impact CPU cycles and processing efficiency.

Innovation Solution

Allocating a virtual interface and one or more virtual command queues to each execution context allows simultaneous transmission of invalidation commands, reducing the need for hypervisor trapping and contention, with error handling and illegal access checks performed by the virtual interface, and using a command queue scheduler to arbitrate between virtual and shadow command queues for efficient insertion into the physical command queue.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple execution contexts share a single physical command queue, then device complexity is reduced, but productivity decreases due to contention and performance degradation

Engineering Contradiction:
Improvecommand queue structureVSAvoidinvalidation command processing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the single physical command queue into multiple virtual command queues (VCQs), with each VCQ dedicated to a specific execution context. This segmentation eliminates contention between contexts while maintaining a unified physical queue structure, thereby improving productivity without significantly increasing device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a command queue virtualizer as an intermediary layer between execution contexts and the physical command queue. This virtualizer manages multiple VCQs and arbitrates their access to the physical queue, resolving contention issues while preserving the simplicity of the underlying physical queue structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the hypervisor traps invalidation requests from guests, then security and control are improved, but productivity decreases due to wasted CPU cycles and delays

Engineering Contradiction:
Improvehypervisor control over invalidationsVSAvoidCPU cycle efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent enables guests to self-service by allowing them to directly issue invalidation commands through their dedicated VCQs without hypervisor trapping. The hypervisor maintains control through the virtualizer layer, which enforces security policies, while guests benefit from reduced CPU cycle waste and improved productivity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent extracts the trapping overhead from the invalidation path by allowing direct guest access to VCQs. The hypervisor's control function is extracted and implemented in the virtualizer layer, which handles only the necessary arbitration and security checks, thereby reducing CPU cycle consumption while maintaining reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If error handling and illegal access checks are performed by the hypervisor, then system security is improved, but device complexity increases and productivity decreases

Engineering Contradiction:
Improveerror handling and access controlVSAvoidhypervisor intervention overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service error handling at the virtual interface level, where the virtualizer performs illegal access checks and error handling for each VCQ independently. This eliminates the need for hypervisor intervention in routine error cases, reducing device complexity and improving productivity while maintaining security through the virtualizer's enforcement of access policies.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11132146B2Technique for efficiently allowing simultaneous access to resources in a computing system
Publication Date: 2021.09.28 NVIDIA CORP
  • US11132146B2 patent drawing
  • US11132146B2 patent drawing
  • US11132146B2 patent drawing

AI summary

Memory page table invalidations for multiple execution contexts (clients or guests) of a memory system are conventionally queued in a single physical command queue. The multiple execution contexts contend to access the queue, resulting in low performance. Instead of contending with other execution contexts to insert invalidation commands into a single physical command queue, a virtual interface and one or more virtual command queues are allocated to each guest. The execution contexts may simultaneously transmit invalidation commands for the memory system through their respective virtual interface. Additionally, each execution context may also transmit other (less often issued) commands through a hypervisor. Error handling and/or illegal access checks specific to invalidation commands that were previously performed by the hypervisor are now performed by the respective virtual interface(s).