Virtual Computer System Node Switching for Memory Access Cost
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Solution Overview
Problem
In systems with a Non-Uniform Memory Access (NUMA) configuration, physical CPUs continue to access remote memory at high cost when the cache capacity is exceeded, leading to prolonged high memory access costs unless the entire system is busy.
Innovation Solution
A virtual computer system with a hypervisor that allocates resources across nodes with a scheduling module that selects physical CPUs based on performance information, switching between nodes to maintain an intermediate memory access performance by utilizing cache memory effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a physical CPU continues to execute processing in a NUMA configuration, then processing can be maintained, but memory access cost remains high when accessing remote memory beyond cache capacity
Solution Approach 1:
The patent dynamically switches the executing physical CPU between different nodes based on cache hit ratios. When the cache hit ratio falls below a threshold, the system transitions from using a remote memory to using local memory by selecting a physical CPU from the same node, thereby reducing memory access cost while maintaining processing continuity.
Solution Approach 2:
The system monitors cache hit ratios as feedback information and uses this data to make scheduling decisions. When the cache hit ratio drops below a predetermined threshold, the scheduling module responds by switching to a physical CPU that can access local memory, creating a closed-loop control system that optimizes memory access cost based on real-time performance feedback.
2Productivity
If the entire computer system becomes busy, then processing of LPARs continues, but high memory access cost persists due to remote memory access
Solution Approach 1:
Even when the system is busy and processing must continue, the patent dynamically adjusts CPU allocation by switching to a different physical CPU from another node when cache performance degrades. This allows the system to maintain high utilization while adapting memory access patterns to reduce cost.
Solution Approach 2:
The system changes the scheduling parameter (which physical CPU executes which logical CPU) based on cache hit ratio thresholds. When performance parameters indicate remote memory access is occurring, the system changes the allocation to use local memory, thereby reducing access cost without stopping processing.
3Productivity
If a physical CPU accesses remote memory, then processing continues, but access speed decreases compared to local memory
Solution Approach 1:
The patent implements dynamic CPU switching to maintain processing continuity while optimizing access speed. When cache hit ratios indicate remote memory access, the system switches to a physical CPU that can access local memory, thereby restoring high-speed access without interrupting overall processing flow.
Solution Approach 2:
The system uses cache hit ratio monitoring as feedback to detect when memory access speed is degrading due to remote access. This feedback triggers a scheduling change to a different physical CPU configuration that provides faster local memory access, creating a self-regulating system that maintains optimal speed.
Data Source
AI summary
A scheduling method whereby a virtualization unit, which has multiple nodes containing physical CPUs and physical memories, and which operates a virtual computer by generating logical partitions from the computer resources of the multiple nodes, allocates a physical CPU to the logical CPU. The multiple nodes are coupled via an interconnect, and the virtualization unit selects the physical CPU to be allocated to the logical CPU, and measures performance information related to the performance when the physical memory is accessed from the logical CPU. When the performance information satisfies a prescribed threshold value the physical CPU allocated to the logical CPU is selected from the same node as that of the previously allocated physical CPU, and when the performance information does not satisfy the prescribed threshold value the physical CPU allocated to the logical CPU is selected from a different node than the node of the previously allocated physical CPU.