Virtual Device Addressing for I2C Multi-Device Read Overhead

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Solution Overview

Problem

The I2C protocol experiences significant signaling overhead, especially when reading or writing short messages, leading to inefficiencies in data transfer rates, particularly when a master device frequently reads sensor data from multiple slave devices, resulting in protocol control overhead overwhelming the data being transferred.

Innovation Solution

Implementing a method that uses virtual device addresses to enable multiple slave devices to perform read/write operations within a single message, with time-multiplexed data slots and aliasing data to map virtual registers to real registers, reducing overhead and maintaining compatibility with existing protocols like I2C and I3C.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the I2C protocol is used for reading sensor data from multiple slave devices, then device compatibility and protocol standardization are maintained, but signaling overhead increases significantly and data transfer efficiency decreases

Engineering Contradiction:
Improveprotocol compatibilityVSAvoiddata transfer efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent merges multiple separate I2C communication transactions into a single extended message that can address multiple slave devices sequentially. Instead of initiating individual read operations for each sensor, the master device sends one message that traverses through multiple slaves in sequence, combining what would traditionally be multiple transactions into one continuous data flow.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent segments the message flow into distinct time slots or phases, where each slave device is addressed in sequence within the same message. The communication is divided into segments that target specific slaves while maintaining a single continuous transaction, allowing efficient multi-device access without protocol overhead repetition.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If traditional I2C protocol is used for multi-device communication, then protocol simplicity and ease of implementation are maintained, but protocol control overhead overwhelms the data being transferred

Engineering Contradiction:
Improveprotocol implementation simplicityVSAvoidprotocol overhead
Core Design Contradiction:
Ease of operationVSLoss of substance

Solution Approach 1:

The patent performs preliminary actions by establishing a single message framework at the beginning that pre-defines the communication path through multiple slave devices. Instead of repeatedly initiating transactions with full protocol overhead (start conditions, address phases, repeated starts), the preliminary message setup enables subsequent data extraction from multiple slaves without repeating the initialization overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent maintains continuity of the communication action by keeping the data bus active and flowing throughout the entire multi-device read operation. The message continues seamlessly from one slave to the next without stopping or resetting, eliminating idle periods and repeated protocol handshakes that would otherwise interrupt the useful data transfer action.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentEP3086236B1Bus communications with multi-device messaging
Publication Date: 2022.06.08 BLACKBERRY LTD
  • EP3086236B1 patent drawingFigure 1
  • EP3086236B1 patent drawingFigure 2A~2B
  • EP3086236B1 patent drawingFigure 3

AI summary

Methods and systems are described for reading from or writing to a plurality of slave devices connected to a communications bus having a common data line. The slave devices are mapped to a virtual device address and the communication is initiated by the master by signaling a start condition and the virtual device address. Each of the slave devices mapped to the virtual device address identifies a register in that slave device associated with the virtual device address and, in sequence, performs a read or write operation on the bus with regard to its identified register in a respective predetermined time slot within the communication or to a corresponding virtual register address assigned to the slave device previously.