Virtual-Flat IC Design Coordinate Transformation
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Solution Overview
Problem
The complexity of digital circuit designs at smaller semiconductor dimensions leads to increased time and cost in design and implementation, as well as the need for tedious transformations across hierarchical levels in integrated circuit physical design, where multiple coordinate systems complicate data manipulation.
Innovation Solution
The system allows users to interact with physical data of integrated circuits as if in a single flat design using a consistent coordinate system, with handles that manage transformations and caching of instance transforms, enabling transparent hierarchy editing across multiple levels of physical hierarchy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If hierarchical design is used to manage complexity, then design organization is improved, but data manipulation complexity increases due to multiple coordinate systems
Solution Approach 1:
The patent introduces a coordinate transformation system that acts as an intermediary between the hierarchical design structure and user operations. This transformation layer automatically converts coordinates between different hierarchical levels, allowing users to manipulate data as if working in a flat design while maintaining the organizational benefits of hierarchy. The transformation mechanism mediates between the hierarchical coordinate systems and user-friendly flat-coordinate operations.
Solution Approach 2:
The patent segments the coordinate system into multiple hierarchical levels, each with its own coordinate space. By dividing the overall coordinate management into discrete hierarchical segments, the system can transform coordinates locally between levels rather than requiring global recoordination. This segmentation allows complex hierarchical designs to be managed through manageable coordinate transformations at each level.
2Ease of operation
If flat design is used for simplified data manipulation, then ease of operation is improved, but design scalability worsens for large complex circuits
Solution Approach 1:
The patent implements a nested hierarchical structure where design blocks are organized in multiple levels of containment. Each block can contain sub-blocks, which can contain further sub-blocks, creating a nested doll-like hierarchy. This nesting allows large complex circuits to be broken down into manageable hierarchical levels while maintaining the ability to access and manipulate any element as if the entire design were flat, due to the coordinate transformation capability.
3Measurement precision
If transformations are calculated in real-time across hierarchy levels, then accuracy is maintained, but processing time increases
Solution Approach 1:
The patent pre-calculates and stores transformation parameters between hierarchical levels during design compilation or initialization. Instead of performing full coordinate transformations in real-time during user operations, the system prepares transformation matrices or lookup tables in advance. This preliminary action maintains coordinate accuracy while dramatically reducing the time required for actual transformation operations during interactive design work.
Data Source
AI summary
In Integrated Circuit (IC) Physical Design, the shapes and other geometric objects that are used to represent the mask data have physical coordinates expressed in a Cartesian plane. When the designs are hierarchical, each level of physical hierarchy has its own coordinate system. When viewed from the top level of a hierarchical design, lower-level shapes must be transformed in order to understand their location from the point of view of the top block. Users and algorithms that manipulate physical data across these hierarchy boundaries must go through the tedious task of transforming data, sometimes multiple times, as it is being changed.