Virtual Function Access for Multi-Tenant Reconfigurable Processors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Reconfigurable processors, particularly coarse-grained reconfigurable architectures (CGRAs), are optimized for single-task and static-workload scenarios, conflicting with the multi-tenancy and dynamic-resource allocation requirements of cloud computing, leading to hardware underutilization due to lack of practical virtualization support for accelerators.

Innovation Solution

A technology enabling the execution of multiple applications on a reconfigurable processor with virtual function support, ensuring isolation and minimal overhead through runtime support for sharing and isolation, using a compiler to map operations to CGR units for parallelism and synchronization in data flow graphs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If reconfigurable processors are optimized for single-task and static-workload scenarios, then execution efficiency for specific tasks is improved, but hardware underutilization occurs due to lack of multi-tenancy support

Engineering Contradiction:
Improveexecution efficiencyVSAvoidmulti-tenancy support
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The reconfigurable processor is divided into multiple isolated reconfigurable regions, each capable of being independently configured and assigned to different virtual machines. This segmentation enables multi-tenancy while maintaining the execution efficiency benefits of dedicated hardware resources for each tenant.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The processor implements dynamic reconfiguration capabilities that allow the hardware architecture to be changed at runtime, enabling different workloads to be assigned to different reconfigurable regions based on demand. This dynamic adaptation resolves the contradiction between static optimization and multi-tenancy flexibility.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If virtualization support is added to reconfigurable accelerators, then resource utilization and multi-client support are improved, but system complexity increases

Engineering Contradiction:
Improvevirtualization supportVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

A runtime management system is introduced as an intermediary layer between the virtual machines and the physical reconfigurable processor. This mediator handles configuration management, resource allocation, and isolation enforcement, thereby enabling virtualization support without requiring complex modifications to the underlying hardware architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If multiple applications are executed on a reconfigurable processor with virtual function support, then resource utilization is improved, but isolation and overhead management become more complex

Engineering Contradiction:
Improveresource utilizationVSAvoidisolation guarantee
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The processor is divided into multiple isolated reconfigurable regions with dedicated configuration spaces and resource access paths. This physical segmentation ensures strong isolation between virtual machines, preventing interference and security violations while allowing high resource utilization through efficient packing of multiple tenants.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12572342B2Configurable access to a reconfigurable processor by a virtual function
Publication Date: 2026.03.10 SAMBANOVA SYSTEMS INC
  • US12572342B2 patent drawing
  • US12572342B2 patent drawing
  • US12572342B2 patent drawing

AI summary

A data processing system is presented that includes a communication link, a runtime processor coupled to the communication link, and one or more reconfigurable processors. A reconfigurable processor of the one or more reconfigurable processors is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes arrays of coarse-grained reconfigurable (CGR) units and an interface to the communication link that couples the reconfigurable processor to the runtime processor via the communication link. The runtime processor is adapted for configuring the interface to the communication link to provide access to the arrays of CGR units through the communication link from a physical function driver and from a virtual function driver.