Virtual Ground Circuitry for Resistive Memory Leakage Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile memory technologies face challenges in reducing leakage current and extending the longevity of resistive memory circuits due to time-dependent gate oxide breakdown during read and write operations, particularly in resistive memory arrays.
Innovation Solution
The implementation of virtual ground circuitry, which generates a virtual ground voltage greater than true ground, is used to reduce leakage current during read operations and mitigate time-dependent gate oxide breakdown by biasing unselected memory cells at the virtual ground level instead of true ground, along with a current compensation technique to maintain the virtual ground voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If true ground (0V) is applied to unselected column lines during read operation, then circuit simplicity is maintained, but leakage current increases and gate oxide breakdown occurs
Solution Approach 1:
The virtual ground voltage is pre-generated and stored in a capacitor before read operations. The virtual ground generator charges the capacitor to the virtual ground voltage level in advance, so that during read operations, the pre-charged capacitor can immediately provide the virtual ground voltage to unselected column lines without requiring continuous active generation, thereby reducing leakage current and gate oxide stress while maintaining circuit feasibility
Solution Approach 2:
A virtual ground voltage (greater than 0V) is introduced as an intermediary voltage level between true ground and positive supply voltage. This intermediate voltage is applied to unselected column lines during read operations, serving as a mediator that reduces the voltage differential across memory cell transistors, thereby minimizing leakage current and gate oxide breakdown while still providing adequate biasing
2Reliability
If virtual ground voltage is applied to unselected column lines, then leakage current is reduced, but virtual ground voltage stability must be maintained
Solution Approach 1:
The virtual ground generator employs feedback control to maintain stable virtual ground voltage. The generator monitors the voltage level and adjusts its output accordingly to maintain the virtual ground voltage at the desired level, ensuring stability despite variations in operating conditions or load changes during read operations
Solution Approach 2:
The memory array parasitic capacitance itself contributes to stabilizing the virtual ground voltage. The distributed capacitance of unselected memory cells acts as a natural reservoir that helps maintain voltage stability, reducing the need for additional active stabilization circuitry and allowing the system to self-regulate the virtual ground voltage level
Data Source
AI summary
A memory includes virtual ground circuitry configured to generate a virtual ground voltage (greater than zero volts) at a virtual ground node, a memory array of resistive memory cells in which each resistive memory cell includes a select transistor and a resistive storage element and is coupled to a first column line of a plurality of first column lines, and a first decoder configured to select a set of first column lines for a memory read operation from a selected set of the resistive memory cells. The memory includes read circuitry, and a first column line multiplexer configured to couple each selected first column line of the set of first column lines to the read circuitry during the memory read operation, and configured to couple each unselected first column line of the plurality of first column lines to the virtual ground node during the memory read operation.