Virtual I2C Register Map for Continuous Large-Data Readout
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Solution Overview
Problem
Existing data transmission methods using I2C protocols in mobile devices, such as smartphones, face challenges in efficiently transferring large data sets from IR sensors due to limitations in register map sizes, leading to slow and complex data readout processes.
Innovation Solution
Implementing a system that extends the I2C register map virtually, allowing data larger than the physical register map size by using a virtual section with addresses in a further memory location, enabling data to be read in a single transaction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a standard 8-bit register map is used for data transfer, then the device structure remains simple, but the data readout speed becomes slow when dealing with large data sets
Solution Approach 1:
The patent extends the register map from a physical 8-bit address space to a virtual address space that can accommodate larger data sets. By introducing a virtual section with addresses beyond the physical register map boundaries, the system enables single-transaction reads of large data buffers without requiring multiple transactions or complex segmentation logic.
Solution Approach 2:
The patent introduces a virtual register map as an intermediary layer between the physical register map and the data buffer. This virtual layer acts as a mediator that translates logical address requests into physical memory accesses, allowing the master controller to read large data sets using simple byte-wise operations without directly managing complex memory segmentation.
2Loss of time
If multiple transactions are used to read large data sets, then complete data transfer is achieved, but transaction gaps and processing delays increase
Solution Approach 1:
The patent enables continuous data transfer by allowing a single I2C transaction to span beyond the physical register map boundaries. The virtual section provides seamless continuation of the data stream, eliminating gaps between transactions and maintaining continuous useful action during data readout operations.
3Productivity
If the register map size is increased to accommodate large data sets, then data readout becomes faster, but the address space requirements exceed standard 8-bit limitations
Solution Approach 1:
The patent resolves the address space limitation by introducing a virtual dimension to the register map. Instead of physically expanding the 8-bit address space, the system creates a virtual address space that maps to the physical memory, allowing addresses beyond 256 bytes to be accessed through a single transaction without requiring more than 8 bits for the register address.
Data Source
AI summary
Disclosed herein is a system including at least one inter-integrated circuit node (I2C node), at least one master controller and at least one inter-integrated circuit (I2C). The I2C is configured for transmitting data between the I2C node and the master controller. The I2C node provides a register map. The master controller is configured for reading the register map byte-wise. The I2C node is configured for incrementing a register address after every byte. The register map includes a physical register map. Data of the physical register map have a physical address in a memory of the I2C node. The I2C node is configured for generating data which size is larger than the physical register map. The register map includes a virtual section, where data of the virtual section have an address in a further memory location. The master controller is configured for reading the virtual section by performing a transaction which starts in the physical register map and increasing the register address beyond the physical register map size.