Virtual Image Processor ISA for Versatile Low-Power Processing

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Solution Overview

Problem

Traditional image processing technologies face a trade-off between versatility in software development and power efficiency, with general-purpose processors consuming more energy and custom-designed circuits offering limited functionality.

Innovation Solution

A virtual image processing instruction set architecture (ISA) and memory model with a two-dimensional shift array structure that allows for a versatile application software development environment while improving power efficiency by using larger blocks of data and parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If general purpose processor is used for image processing, then software development versatility is improved, but power consumption per unit of data increases

Engineering Contradiction:

Improvesoftware development versatilityVSAvoidpower consumption per unit of data

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces a virtual processor as an intermediary between the general-purpose CPU and the image processing hardware. This virtual processor provides a customized instruction set architecture that bridges the gap, allowing software developers to write code for a specialized architecture while running on general-purpose hardware, thus achieving both versatility and improved power efficiency

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the architectural parameters by creating a virtual processor with a customized instruction set architecture tailored for image processing. This virtual processor uses larger data blocks and parallel processing mechanisms, fundamentally changing how image processing is performed compared to traditional general-purpose processors

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If custom designed fixed function circuitry is used for image processing, then power consumption per unit of data is reduced, but functional versatility deteriorates

Engineering Contradiction:

Improvepower consumption per unit of dataVSAvoidfunctional versatility

Core Design Contradiction:

Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The virtual processor is designed to be universally applicable to various image processing tasks while maintaining the power efficiency of custom hardware. It provides a unified architecture that can handle different image processing algorithms and operations through its customized instruction set, making it multi-functional without sacrificing power efficiency

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates a virtual copy of a specialized image processing processor that can run on general-purpose hardware. This virtual processor replicates the functionality and power efficiency characteristics of custom hardware while maintaining software versatility, effectively copying the benefits of specialized architecture without the hardware constraints

Inventive Principle:

Principle #26Copying

3Adaptability or versatility

If finer grained data structures are used in general purpose processing, then software flexibility is improved, but processing overhead and energy consumption increase

Engineering Contradiction:

Improvesoftware flexibilityVSAvoidprocessing overhead

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the image processing task into operations on larger data blocks rather than individual pixels. This segmentation approach reduces the overhead associated with processing each pixel independently while maintaining software flexibility through the virtual processor's instruction set architecture that operates on these larger blocks

Inventive Principle:

Principle #1Segmentation

Data Source

PatentEP3286721B1Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure

Publication Date: 2020.11.25 GOOGLE LLC

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AI summary

A method is described that includes instantiating, within an application software development environment, a virtual processor having an instruction set architecture and memory model that contemplate first and second regions of reserved memory. The first reserved region is to keep data of an input image array. The second reserved region is to keep data of an output image array. The method also includes simulating execution of a memory load instruction of the instruction set architecture by automatically targeting the first reserved region and identifying desired input data with first and second coordinates relative to the virtual processor's position within an orthogonal coordinate system and expressed in the instruction format of the memory load instruction.