Data Transmission via Virtual I/O Ring Hardware Acceleration

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Solution Overview

Problem

The processing capabilities of hardware devices are insufficient after network function virtualization (NFV), leading to increased data packet processing time and insufficient throughput.

Innovation Solution

A data transmission method and apparatus that utilizes a hardware accelerator and a daemon process on a host machine to perform acceleration operations on data packets through a predefined data structure in a virtual input/output ring, minimizing context switches and implementing bidirectional zero copy to enhance throughput and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If network function virtualization is implemented with universal hardware, then hardware resources can be shared flexibly and deployment is accelerated, but processing capabilities become insufficient and data packet processing time increases

Engineering Contradiction:
Improvehardware resource sharing flexibilityVSAvoiddata packet processing throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent introduces a hardware acceleration device as an intermediary component between the virtualized network functions and the universal hardware. This mediator provides specialized processing capabilities for data packet acceleration while allowing the host system to maintain hardware virtualization and resource sharing flexibility. The hardware accelerator handles specific processing tasks that would otherwise burden the universal hardware, thus resolving the contradiction between versatile resource sharing and sufficient processing throughput.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If hardware accelerator is introduced to accelerate data packet processing, then throughput capability is enhanced, but system complexity increases

Engineering Contradiction:
Improvedata packet throughput capabilityVSAvoidsystem architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The hardware acceleration device is designed to operate autonomously with self-contained processing capabilities. It independently handles data packet acceleration tasks without requiring complex coordination or management overhead from the host system. The device manages its own operation and integration, reducing the burden on system complexity while maintaining enhanced throughput capabilities.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If virtual machine memory is used as staging area for data transmission, then VM portability is maintained, but data transmission efficiency is reduced due to context switches

Engineering Contradiction:
ImproveVM migration capabilityVSAvoiddata transmission time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent segments the data transmission path into separate components: the hardware acceleration device handles the acceleration operations independently, while the virtual machine memory maintains its role for portability. This segmentation allows the hardware accelerator to process data packets directly without requiring them to be staged in virtual machine memory, thereby eliminating unnecessary context switches and reducing transmission time while preserving VM migration capabilities.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3460658B1Data transmission method and apparatus
Publication Date: 2025.08.06 HUAWEI TECH CO LTD
  • EP3460658B1 patent drawingFigure 1
  • EP3460658B1 patent drawingFigure 2
  • EP3460658B1 patent drawingFigure 3

AI summary

A data transmission method and apparatus are disclosed, and applied to a daemon process on a host machine. The method includes: obtaining information required for performing an acceleration operation in a virtual input/output ring of a target virtual accelerator, where the information required for performing the acceleration operation uses a predefined data structure, and the data structure occupies one entry of the virtual input/output ring of the target virtual accelerator; determining, according to the information required for performing the acceleration operation, information that can be recognized by the hardware accelerator; and sending the information that can be recognized by the hardware accelerator to the hardware accelerator, where the hardware accelerator is configured to obtain to-be-accelerated data according to the information that can be recognized by the hardware accelerator and perform the acceleration operation on the to-be-accelerated data. The method and apparatus can improve data packet transmission efficiency.