Virtual Load Queue via Address Generation Scheduler Queue
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Solution Overview
Problem
The depth of the load queue (LDQ) in processors limits the effective window size, causing dispatch stalls when LDQ entries are full, restricting the number of instructions that can be processed simultaneously.
Innovation Solution
Implementing a virtual load queue system where load micro-operations that do not require further tracking are processed without an LDQ entry, using an address generation scheduler queue (AGSQ) entry instead, which is deallocated only when the micro-operation is one of the N oldest or upon successful completion, thereby mitigating the limiting effect of LDQ depth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the load queue depth is increased to process more instructions concurrently, then the number of instructions per clock improves, but timing problems and dispatch stalls occur
Solution Approach 1:
The patent divides the load queue functionality into two separate structures: the load queue (LDQ) for tracking oldest load micro-operations and the address generation scheduler queue (AGSQ) for address generation scheduling. This segmentation allows independent management of load tracking and address generation, enabling deeper effective window size without proportionally increasing LDQ depth and associated timing problems
Solution Approach 2:
The AGSQ acts as an intermediary structure between the fetch/decode stages and the LDQ. Load micro-operations are first scheduled in the AGSQ, and only the N oldest load micro-operations are tracked in the LDQ. This intermediary mechanism allows the system to process more than N load micro-operations concurrently while maintaining LDQ depth at N, resolving the contradiction between throughput and timing
2Adaptability or versatility
If the load queue depth is increased to allow more instructions to be processed at one time, then the effective window size improves, but the queue lifetime and timing problems worsen
Solution Approach 1:
The patent segments the queue functionality so that the LDQ maintains a fixed depth N for tracking oldest load micro-operations, while the AGSQ provides extended scheduling capacity. This segmentation allows the effective window size to exceed N without increasing the LDQ lifetime and associated timing problems
Solution Approach 2:
The patent adds a temporal dimension to queue management by implementing different allocation rules: AGSQ entries are allocated at dispatch for all load micro-operations, while LDQ entries are allocated only for the N oldest load micro-operations. This dimensional differentiation allows extended window size while maintaining fixed LDQ lifetime
Data Source
AI summary
A system and method for a virtual load queue is described. Load micro-operations are processed through an instruction pipeline without requiring an entry in a load queue (LDQ). An address generation scheduler queue (AGSQ) entry is allocated to the load micro-operation and a LDQ entry is not allocated to the load micro-operation. The LDQ entries are reserved for the N oldest load micro-operations, where N is the depth of the LDQ. Deallocation of the AGSQ entry is done if the load micro-operation is one of the N oldest load micro-operations, or upon successful completion of the load micro-operation. Deallocation of the AGSQ entry is not done if the load micro-operation gets a bad status and is not one of the N oldest micro-operations. Consequently, the AGSQ acts as a virtual queue for the LDQ and mitigates the limiting effect of the LDQ depth.