Virtual Physical Extended Memory Array Repair
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Solution Overview
Problem
Current memory devices face challenges in increasing addressable memory space without expanding the memory device layout or die size, and are susceptible to damage from stress events that render physical rows inoperable, necessitating enhanced functionality and failure mitigation.
Innovation Solution
The implementation of a virtual and physical extended memory array system that utilizes redundant memory elements to replace or create virtual rows, allowing for increased addressable space without increasing physical array density, and includes post-package and soft post-package repair mechanisms to manage and maintain virtual address space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the physical memory array is expanded to increase addressable memory space, then the storage capacity is improved, but the memory device layout or die size increases
Solution Approach 1:
The patent introduces a virtual dimension by implementing a virtual memory array that maps to physical memory elements through a translation layer. This virtualization approach allows the system to present a larger addressable space than the physical array can directly support, effectively adding a dimensional layer of abstraction between the physical constraints and the logical address space.
Solution Approach 2:
The patent creates virtual copies of physical memory rows through the virtual memory array. Instead of physically duplicating memory elements, it generates virtual representations that can be mapped to available physical rows, allowing multiple virtual rows to reference the same or different physical rows as needed, thereby expanding the logical address space without proportional physical expansion.
2Reliability
If redundant memory elements are used to replace damaged physical rows, then the reliability is improved, but the device complexity increases
Solution Approach 1:
The patent implements self-service repair capabilities where the memory device automatically detects damaged physical rows and remaps them to redundant memory elements without external intervention. The system includes built-in mechanisms for identifying failures, selecting appropriate redundant elements, and updating the mapping relationships, thereby providing autonomous repair functionality that reduces operational complexity despite the sophisticated repair capabilities.
Solution Approach 2:
The patent pre-configures redundant memory elements and establishes mapping relationships before failures occur. The virtual memory array is designed with spare rows that are ready to be activated and mapped to physical rows as needed. This preliminary preparation of repair resources and mapping structures reduces the complexity of actual repair operations when failures occur.
Data Source
AI summary
A memory device for extending addressable array space by incorporating virtual and physical memory arrays is disclosed. When extra storage space beyond a physical memory array is needed by a controller of the memory device, the storage space may be provided by extending the address space using a virtual array. The memory device incorporates the use of an extra row address bit to increase the addressable space, whereby the extra bit is utilized to address virtual rows in the virtual array. Spare or redundant physical memory elements utilized for memory repair may be programmed to a virtual address space for the virtual memory array. When a memory device operation is activated, the extra row address bit is set to high, and the virtual row address matches with a spare or redundant memory element, the virtual row in the virtual array space is activated for performance of the operation.