Virtual Memory Controller for Seamless OTA Update Switching

The patent implements a universal address space design where both application image copies (first and second images) are mapped to the same virtual address range. The virtual memory controller dynamically redirects address translations based on an active image identifier, allowing the system to switch between images without requiring separate address spaces. This multi-functional approach enables single address space to serve multiple image storage purposes, improving reliability through redundancy while optimizing memory utilization.

The patent performs preliminary actions by pre-configuring the virtual memory controller with offset values and establishing the active image identifier before execution begins. During system initialization, the correct image is already positioned in the address space with proper offset translations configured, enabling immediate execute-in-place operation without runtime copying. This preliminary setup maintains fast access speed while preserving adaptability, as the virtual memory controller can subsequently switch between pre-positioned images during updates.

The patent introduces a virtual memory controller as an intermediary component between the processor and non-volatile memory. This controller handles all address translation operations by modifying virtual addresses with stored offsets and redirecting accesses based on the active image identifier. The intermediary absorbs the complexity of address translation, keeping the processor architecture simple while enabling flexible image switching and updates through centralized control in the virtual memory controller.