Virtual Memory Region Mapping for Adaptive Huge-Page Allocation

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Solution Overview

Problem

Conventional page management technologies result in excessive page fault processing and reduced page table cache hit rates due to small page granularity, limiting system performance, while huge-page management technologies are highly coupled to hardware, restricting selectable granularity and causing high memory overheads and compatibility issues.

Innovation Solution

A memory management method that allocates virtual memory regions based on different backend types, determining physical page types as common or huge pages, and establishing mapping relationships to optimize memory usage, allowing for independent page table and page allocator granularities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional page management technology is used, then page table cache hit rate is improved, but page fault processing frequency increases excessively

Engineering Contradiction:

Improvepage table cache hit rateVSAvoidpage fault processing frequency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent segments memory management into two independent components: page table management and page allocation. The page table operates at conventional granularity for cache efficiency, while the page allocator operates at huge-page granularity for reduced page faults. This segmentation allows each component to optimize independently, resolving the contradiction between cache hit rate and page fault frequency.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of abstraction by separating the page table (virtual memory management) from the physical page allocator. This dimensional separation allows the page table to maintain conventional granularity for cache efficiency while the physical allocator uses huge pages for reduced fault frequency, effectively resolving the trade-off.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If huge-page management technology is used, then page fault processing frequency is reduced, but hardware coupling increases and compatibility decreases

Engineering Contradiction:

Improvepage fault processing frequencyVSAvoidhardware compatibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a virtual memory region as an intermediary layer between the page table and physical page allocator. This intermediary enables the system to abstract the huge-page mechanism from hardware dependencies, allowing software-based huge-page management that is compatible with various hardware configurations and operating systems.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces hardware-based huge-page management mechanisms with a software-based virtual memory region approach. By using virtual memory regions that can be mapped to physical pages at different granularities, the system eliminates direct hardware coupling while maintaining the benefits of reduced page fault frequency.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Productivity

If huge-page management technology is used, then page fault processing frequency is reduced, but memory overhead increases

Engineering Contradiction:

Improvepage fault processing frequencyVSAvoidmemory overhead

Core Design Contradiction:

ProductivityVSQuantity of substance

Solution Approach 1:

The patent applies partial huge-page allocation rather than universal huge-page management. Virtual memory regions are allocated at conventional granularity, but only mapped to huge physical pages when beneficial. This partial application reduces the memory overhead associated with huge-page bookkeeping while still achieving reduced page fault frequency for working sets that benefit from huge pages.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS20260072785A1Memory management method, electronic device, and storage medium

Publication Date: 2026.03.12 HUAWEI TECH CO LTD

AI summary

A memory management method, an electronic device, and a storage medium are disclosed. The method includes: allocating a virtual memory in response to a received memory allocation request; creating a virtual memory region for the allocated virtual memory, and binding the virtual memory region to a target backend, where the backend indicates a type of a data source; determining a physical page type based on the target backend, where the physical page type includes a common-physical-page type and a huge-physical-page type; and allocating or loading a physical page based on the physical page type, and establishing a first mapping relationship between the virtual memory region and the allocated physical page or the loaded physical page. The method helps improve memory performance and reduce memory overheads.