Virtual Memory Page Size Remapping for TLB Efficiency

Solution Overview

Problem

Current virtual memory management systems, particularly in systems like LINUX, are limited by small page sizes (e.g., 4 KB) which lead to insufficient TLB cache entries, making it difficult to support large virtual address spaces efficiently without increasing the TLB size, and do not readily support larger page sizes like 2 MB for existing executable files or shared libraries without significant modifications.

Innovation Solution

A method and system that allow existing modules to be mapped using a larger page size (e.g., 2 MB) by allocating temporary buffers, copying data, and remapping virtual memory portions to these larger pages, while maintaining compatibility with existing systems and tools, using APIs like HugeTLBFS and modifying memory mapping structures to track correct file information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If small page sizes (e.g., 4 KB) are used for virtual memory management, then compatibility with existing systems is maintained, but the number of TLB entries required increases, reducing memory management efficiency

Engineering Contradiction:

Improvecompatibility with existing systemsVSAvoidmemory management efficiency

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The system dynamically supports multiple page sizes (4 KB and 2 MB) depending on the memory mapping requirements. The page size is not fixed but can be adjusted based on whether standard compatibility or enhanced efficiency is needed, allowing the system to adapt between different performance and compatibility requirements

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the page size parameter from the fixed 4 KB to variable page sizes including 2 MB for certain memory mappings. This parameter change enables fewer TLB entries to be needed while maintaining system functionality, directly addressing the efficiency problem

Inventive Principle:

Principle #35Parameter changes

2Productivity

If larger page sizes (e.g., 2 MB) are used for virtual memory management, then the number of TLB entries is reduced and memory management efficiency is improved, but compatibility with existing modules and tools is compromised

Engineering Contradiction:

Improvememory management efficiencyVSAvoidcompatibility with existing modules

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The system dynamically supports multiple page sizes (4 KB and 2 MB) depending on the memory mapping requirements. The page size is not fixed but can be adjusted based on whether standard compatibility or enhanced efficiency is needed, allowing the system to adapt between different performance and compatibility requirements

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the page size parameter from the fixed 4 KB to variable page sizes including 2 MB for certain memory mappings. This parameter change enables fewer TLB entries to be needed while maintaining system functionality, directly addressing the efficiency problem

Inventive Principle:

Principle #35Parameter changes

3Productivity

If existing modules are remapped to larger pages, then memory management efficiency is improved, but the complexity of memory mapping operations increases

Engineering Contradiction:

Improvememory management efficiencyVSAvoidmemory mapping operation complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The memory mapping process is segmented into distinct phases: first mapping modules to temporary buffers using standard 4 KB pages for safety and compatibility, then selectively remapping to 2 MB pages for efficiency. This segmentation allows the complex operation to be performed in manageable steps with controlled risk

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Temporary buffers serve as an intermediary between the original module location and the final remapped location. These buffers provide a safe transition zone where data can be copied and validated before the actual remapping occurs, reducing the complexity and risk of direct remapping operations

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9727256B1Virtual memory management techniques

Publication Date: 2017.08.08 EMC IP HLDG CO LLC

AI summary

Described are techniques that map virtual to physical memory. A first module may be loaded into a first physical memory location mapped, using a first page size, to a first virtual address space. A virtual memory portion of the first virtual address space may be identified that is a virtual address range mapped to at least a portion of the first physical memory location including the first module. First data of the first physical memory location may be copied to a second physical memory location. A set of pages of physical memory may be identified. Each such page may be a second page size. The virtual memory portion may be remapped to the set of pages using a page size that is the second page size. The first data may be copied from the second physical memory location to the set of one or more pages of physical memory.