Virtual Memory Page Table Manipulation for Contiguous Prefetching
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Solution Overview
Problem
Legacy memory allocation schemes fail to ensure contiguous memory allocation, leading to inefficient prefetching by caching subsystems, resulting in increased memory latency and wasted fetch cycles due to the prefetching of non-contiguous data.
Innovation Solution
The technique involves managing virtual memory pages to form virtually-contiguous memory ranges by manipulating paging registers, allowing contiguous virtual address areas to be mapped to non-contiguous physical memory locations, thereby improving the likelihood of prefetching the next data needed by the application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If legacy memory allocation schemes allocate real memory without regard to contiguity, then memory allocation flexibility is improved, but prefetching effectiveness deteriorates
Solution Approach 1:
The patent segments the page table into multiple independently manageable sections, allowing certain segments to be remapped to create virtually contiguous memory regions while leaving other segments unchanged. This enables selective optimization of memory regions for prefetching without affecting overall memory allocation flexibility.
Solution Approach 2:
The patent introduces a virtual memory dimension that decouples the logical view of memory from the physical reality. By manipulating page table entries in the virtual address space, the system creates an illusion of contiguity that enables effective prefetching, while the underlying physical memory remains flexibly allocated.
2Productivity
If legacy memory allocation schemes allocate non-contiguous real memory, then memory utilization is improved, but memory access latency increases
Solution Approach 1:
The patent introduces page table manipulation as an intermediary layer between the application and physical memory. This intermediary creates virtual contiguity that enables prefetching without requiring actual physical contiguity, thus maintaining high memory utilization while reducing access latency through effective prefetching.
Solution Approach 2:
The patent enables preliminary prefetching actions by creating virtually contiguous memory regions. Data can be prefetched in advance along the virtual memory sequence, and this prefetched data is already in cache when needed, eliminating latency without requiring contiguous physical allocation.
3Area of stationary object
If prefetching is performed on non-contiguous physical memory addresses, then prefetching coverage is improved, but prefetching accuracy deteriorates
Solution Approach 1:
The patent shifts the prefetching operation from the physical memory dimension to the virtual memory dimension. By prefetching along contiguous virtual address sequences and using page table manipulation to map these to appropriate physical locations, the system achieves both wide coverage and high accuracy in prefetching.
Solution Approach 2:
The patent segments the memory address space and processes prefetching on a per-segment basis using page table entries. This allows accurate prediction of next data locations within each segment while maintaining broad overall coverage across the entire virtual address space.
Data Source
AI summary
Systems and methods for managing contiguous addressing via virtual paging registers in a page table used in a high-performance computing platform. One embodiment commences upon initializing a first paging register with a first virtual address of a first virtual address length to form a first virtual address space, then receiving a request from a process to allocate physical memory corresponding to a second virtual address request. A memory allocator allocates the requested physical memory from a physical memory location determined by the memory allocator. An operating system or other sufficiently privileged access identifies a second paging register that is contiguously adjacent to the first paging register. If the second paging register is already in use, then the method identifies an unused (third) paging register into which the contents of the second paging register can be relocated. The method stores the second virtual address into the now freed-up second paging register.


