Virtual Memory Address Mapping to Avoid Wrap-Around Allocation
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Solution Overview
Problem
Existing virtual memory management systems face the 'wrap-around' problem where free memory blocks cannot be reallocated due to circular management schemes, and increasing virtual address space to alleviate this issue increases the number of bits required for addressing and does not fully resolve the wrap-around problem.
Innovation Solution
Implement a virtual memory addressing scheme with multiple virtual address spaces, each comprising multiple contiguous pages, and use a virtual memory table to translate these addresses to physical memory, allowing flexible allocation and addressing to avoid the wrap-around issue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If circular management scheme is used for memory allocation, then memory blocks are allocated in a systematic order, but free blocks cannot be reallocated when older blocks exist causing wrap-around problem
Solution Approach 1:
The patent divides the single linear memory address space into multiple circular memory structures (CM0, CM1, CM2, etc.), each managing a portion of memory blocks. This segmentation allows different circular structures to operate independently, so when one circular structure experiences wrap-around, other structures can still allocate memory blocks, thereby resolving the reallocation flexibility issue while maintaining systematic allocation.
Solution Approach 2:
The patent transitions from a one-dimensional linear memory allocation approach to a multi-dimensional structure by organizing memory into multiple circular memory structures with wrap-around pointers. This dimensional change enables memory allocation to continue across multiple circular buffers, eliminating the single-point wrap-around limitation and improving reallocation flexibility.
2Quantity of substance
If virtual address space is increased to alleviate wrap-around problem, then more memory can be addressed, but number of bits required for addressing increases
Solution Approach 1:
The patent segments the virtual address space into multiple distinct virtual address spaces (VAS0, VAS1, VAS2, etc.), each mapping to corresponding circular memory structures. By dividing the address space, the system can manage larger total memory capacity without requiring a single large address space, thereby avoiding the need for excessive address bits while still providing expanded addressable memory through multiple smaller address spaces.
Solution Approach 2:
The patent introduces a memory management unit (MMU) as an intermediary that handles address translation between virtual address spaces and physical memory addresses. The MMU manages the mapping between multiple virtual address spaces and circular memory structures, enabling the system to address large memory capacities through software-managed translation rather than requiring proportionally larger hardware address buses.
3Adaptability or versatility
If multiple virtual address spaces are implemented, then wrap-around problem is avoided and memory usage is optimized, but address translation complexity increases
Solution Approach 1:
The patent segments the address translation function by creating dedicated mapping structures for each virtual address space to its corresponding circular memory structures. Each virtual address space has its own set of mapping entries, allowing independent management and translation. This segmentation simplifies the translation process for each individual space while supporting multiple spaces overall, balancing flexibility with manageable complexity.
Solution Approach 2:
The patent establishes predetermined mapping relationships between virtual address spaces and circular memory structures during system initialization. By pre-configuring the mapping tables and associations, the system reduces runtime translation complexity, as the MMU can directly use these pre-established mappings rather than dynamically computing relationships during address translation operations.
Data Source
AI summary
A method of managing access to a physical memory formed of n memory page frames using a set of virtual address spaces having n virtual address spaces each formed of a plurality p of contiguous memory pages. The method includes receiving a write request to write a block of data to a virtual address within a virtual address space i of the n virtual address spaces, the virtual address defined by the virtual address space i, a memory page j within that virtual address space i and an offset from the start of that memory page j; translating the virtual address to an address of the physical memory using a virtual memory table having n by p entries specifying mappings between memory pages of the virtual address spaces and memory page frames of the physical memory, wherein the physical memory address is defined by: (i) the memory page frame mapped to the memory page j as specified by the virtual memory table, and (ii) the offset of the virtual address; and writing the block of data to the physical memory address.


