Virtual Paging Structures for Deterministic Shared Memory Access
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Solution Overview
Problem
Symmetric multiprocessor systems face challenges in maintaining deterministic memory access ordering and fault tolerance, particularly in loosely coupled configurations, where simultaneous access to shared memory by multiple processors can lead to non-deterministic outcomes, and existing solutions require custom hardware or extensive modifications to operating systems and applications.
Innovation Solution
The implementation of virtual paging structures that reflect physical page access privileges allows for coordinated deterministic shared memory access between processors, using techniques such as shadow page tables and nested page tables to manage access rights and ensure consistent memory access across multiple processors, even in industry-standard hardware configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If duplication is used for fault tolerance, then reliability is improved, but device complexity increases due to dedicated duplicate hardware
Solution Approach 1:
The patent applies universality by allowing a single set of hardware resources to serve multiple functions: it acts as primary processing resources during normal operation and as backup resources when failures occur. The virtualization layer enables the same physical infrastructure to provide both computational capacity and fault tolerance, eliminating the need for dedicated duplicate hardware while maintaining reliability.
Solution Approach 2:
The patent uses copying by creating virtual copies of processing resources through virtualization. Instead of duplicating physical hardware, the system creates virtual instances that can be replicated and migrated across physical resources. This allows fault tolerance through virtual replication rather than physical duplication, reducing device complexity while maintaining reliability.
2Reliability
If deterministic memory access ordering is implemented, then reliability is improved, but device complexity increases due to coordination requirements
Solution Approach 1:
The patent introduces an intermediary virtualization layer that mediates between multiple processors and shared memory resources. This virtualization layer manages memory access coordination, ensuring deterministic ordering without requiring direct complex coordination between processors. The intermediary handles the complexity of coordination internally while presenting a simplified interface to processors.
Solution Approach 2:
The patent implements feedback mechanisms where the virtualization layer monitors memory access patterns and dynamically adjusts resource allocation and access ordering. This feedback loop ensures deterministic behavior by detecting and correcting access ordering issues in real-time, maintaining reliability without requiring pre-configured complex coordination protocols.
3Device complexity
If virtualization is used to reduce hardware requirements, then device complexity is reduced, but measurement precision worsens due to virtual-to-physical translation overhead
Solution Approach 1:
The patent applies preliminary action by pre-establishing virtual-to-physical mappings and access patterns during system initialization and resource allocation. By determining and caching the translation relationships in advance, the system minimizes runtime translation overhead and maintains precise timing measurements. The virtualization layer prepares access paths beforehand, reducing the precision loss that would otherwise occur during dynamic translation.
Data Source
AI summary
A symmetric multiprocessing fault-tolerant computer system controls memory access in a symmetric multiprocessing computer system. To do so, virtual page structures are created, where the virtual page structures reflect physical page access privileges to shared memory for processors in a symmetric multiprocessing computer system. Access to shared memory is controlled based on physical page access privileges reflected in the virtual paging structures to coordinate deterministic shared memory access between processors in the symmetric multiprocessing computer system. A symmetric multiprocessing fault-tolerant computer system may use duplication or continuous replay.